A 5.8 GHz RF Receiver Front-End with 77.6 dB Dynamic Range AGC for a DSRC Transceiver
Open Access
- 13 January 2022
- journal article
- research article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Access
- Vol. 10, 1
Abstract
This paper presents a 5.8 GHz highly sensitive, high-dynamic-range RF receiver front-end with Automatic-Gain Control (AGC) and a high image-rejection for a Dedicated Short-Range Communication (DSRC) application. It is formed by a transceiver common matching, a single to differential Low-Noise Amplifier (LNA), an active mixer with an Image Rejection Filter, and an AGC unit. The proposed AGC unit is composed of a power-detector over the intermediate-frequency signals of the downconverter mixer. The power detector produces a wide dynamic range response signal, which eases the controllability of the AGC unit. In addition, external components are minimized, and area occupation is optimized. The proposed RF-FE is fabricated and measured in a 130-nm RF CMOS process. Experimental results show an overall dynamic range of 77.6 dB while a high sensitivity performance to an input power level of −85 dBm is measured. An overall gain of 26.4 dB for the RF-FE is obtained. The input referred P1dB is measured to be around −28.3 dBm. The 2-stage RC poly-phase filter that is applied to reject the image signal results in a maximum image rejection ratio of 39 dB.Keywords
This publication has 16 references indexed in Scilit:
- A 5.8 GHz Digitally Controlled CMOS Receiver With a Wide Dynamic Range for Chinese ETC SystemIEEE Transactions on Circuits and Systems II: Express Briefs, 2017
- 0.16 mW, 7–70 GHz distributed power detector with 75 dB voltage sensitivity in 130 nm standard CMOS technology2017
- A 0.9–5.8-GHz Software-Defined Receiver RF Front-End With Transformer-Based Current-Gain Boosting and Harmonic Rejection CalibrationIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017
- A High IIP2 SAW-Less Superheterodyne Receiver With Multistage Harmonic RejectionIEEE Journal of Solid-State Circuits, 2016
- Compact transponder front-end with enhanced gain for electronic toll collection at 5.8 GHz2015
- CMOS noise canceling balun LNA with tunable bandpass from 4.6 GHz to 5.8 GHz2014
- A 2.4/5.8 GHz 10 μW wake-up receiver with −65/−50 dBm sensitivity using direct active rf detection2012
- Wideband Balun-LNA With Simultaneous Output Balancing, Noise-Canceling and Distortion-CancelingIEEE Journal of Solid-State Circuits, 2008
- A 2.4-GHz Low-Power Low-IF Receiver and Direct-Conversion Transmitter in 0.18-$\mu{\hbox {m}}$ CMOS for IEEE 802.15.4 WPAN ApplicationsIEEE Transactions on Microwave Theory and Techniques, 2007
- An experimental coin-sized radio for extremely low-power wpan (IEEE 802.15.4) application at 2.4 ghzIEEE Journal of Solid-State Circuits, 2003