Parallel Programmable Asynchronous Neighborhood Mechanism for Kohonen SOM Implemented in CMOS Technology
- 28 October 2011
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Neural Networks
- Vol. 22 (12) , 2091-2104
Abstract
We present a new programmable neighborhood mechanism for hardware implemented Kohonen self-organizing maps (SOMs) with three different map topologies realized on a single chip. The proposed circuit comes as a fully parallel and asynchronous architecture. The mechanism is very fast. In a medium sized map with several hundreds neurons implemented in the complementary metal-oxide semiconductor 0.18 μm technology, all neurons start adapting the weights after no more than 11 ns. The adaptation is then carried out in parallel. This is an evident advantage in comparison with the commonly used software-realized SOMs. The circuit is robust against the process, supply voltage and environment temperature variations. Due to a simple structure, it features low energy consumption of a few pJ per neuron per a single learning pattern. In this paper, we discuss different aspects of hardware realization, such as a suitable selection of the map topology and the initial neighborhood range, as the optimization of these parameters is essential when looking from the circuit complexity point of view. For the optimal values of these parameters, the chip area and the power dissipation can be reduced even by 60% and 80%, respectively, without affecting the quality of learning.Keywords
This publication has 22 references indexed in Scilit:
- Realization of the Conscience Mechanism in CMOS Implementation of Winner-Takes-All Self-Organizing Neural NetworksIEEE Transactions on Neural Networks, 2010
- A novel hardware-oriented Kohonen SOM image compression algorithm and its FPGA implementationJournal of Systems Architecture, 2008
- The Impact of Arithmetic Representation on Implementing MLP-BP on FPGAs: A StudyIEEE Transactions on Neural Networks, 2007
- Robust Neural-Network-Based Classification of Premature Ventricular Contractions Using Wavelet Transform and Timing Interval FeaturesIEEE Transactions on Biomedical Engineering, 2006
- Recognition of ECG Patterns Using Artificial Neural Network2006
- Parallel FPGA implementation of self-organizing maps2005
- ASIC design of a Kohonen neural network microchip2004
- An easy-to-use mismatch model for the MOS transistorIEEE Journal of Solid-State Circuits, 2002
- A CMOS analog circuit for Gaussian functionsIEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 1996
- Analog implementation of a Kohonen map with on-chip learningIEEE Transactions on Neural Networks, 1993