Simultaneous block and I/O buffer floorplanning for flip-chip design
Authors:
- Chih-Yang PengCPChih-Yang Peng
- Wen-Chang ChaoWCWen-Chang Chao
- Yao-Wen ChangYCYao-Wen Chang
- Jyh-Herng WangJWJyh-Herng Wang
- 22 March 2006
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
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