LAMP: Logic-Circuit Simulators
Authors:
- S. G. ChappellSCS. G. Chappell
- C. H. ElmendorfCEC. H. Elmendorf
- L D. SchmidtLSL D. Schmidt
- 1 October 1974
- journal article
- website
- Published by Institute of Electrical and Electronics Engineers (IEEE) in Bell System Technical Journal
- Vol. 53 (8) , 1451-1476
Abstract
The algorithms used for logic-circuit simulation in the Logic Analyzer for Maintenance Planning (LAMP) system are described. Several simulators are available to allow a cost-effective tradeoff between simulation cost and the level of detail needed fo...Keywords
This publication has 8 references indexed in Scilit:
- A Deductive Method for Simulating Faults in Logic CircuitsIEEE Transactions on Computers, 1972
- Simulation of large asynchronous logic circuits using an ambiguous gate model1971
- A model and implementation of a universal time delay simulator for large digital nets1970
- A three-value computer design verification systemIBM Systems Journal, 1969
- Design and Use of Fault Simulation for Saturn Computer DesignIEEE Transactions on Electronic Computers, 1967
- Analysis of Graphs by Connectivity ConsiderationsJournal of the ACM, 1966
- On an Improved Diagnosis ProgramIEEE Transactions on Electronic Computers, 1965
- Revised report on the algorithmic language ALGOL 60Communications of the ACM, 1963