A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference

This publication has 47 references indexed in Scilit:

• High-Performance Mixed-Signal Neurocomputing With Nanoscale Floating-Gate Memory Cell Arrays
  IEEE Transactions on Neural Networks and Learning Systems, 2017
• Binary neural network with 16 Mb RRAM macro chip for classification and online training
  2016
• ISAAC: A Convolutional Neural Network Accelerator with In-Situ Analog Arithmetic in Crossbars
  2016
• Deep Residual Learning for Image Recognition
  2016
• Rethinking the Inception Architecture for Computer Vision
  2016
• Show and tell: A neural image caption generator
  2015
• ImageNet Large Scale Visual Recognition Challenge
  International Journal of Computer Vision, 2015
• Reliability Impact of Chalcogenide-Structure Relaxation in Phase-Change Memory (PCM) Cells—Part I: Experimental Study
  IEEE Transactions on Electron Devices, 2009
• BLEU
  2001
• Long Short-Term Memory
  Neural Computation, 1997