Analysis of channel mobility in GaN-based metal-oxide-semiconductor field-effect transistors

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Abstract
The factors limiting channel mobility in AlSiO/p-type GaN-based metal-oxide-semiconductor field-effect transistors (MOSFETs) were systematically investigated. MOSFETs with various thin interfacial layers (ILs) between Al0.78Si0.22Oy films and Mg-doped GaN layers were prepared and found to exhibit different channel mobilities. The maximum effective mobility showed a significant correlation with the threshold voltage (Vt) and the hysteresis (ΔVt) in the transfer characteristics of these devices, such that the mobility decreased with increasing Vt and ΔVt. This effect can be explained by electron capture in and emission from border traps situated near the conduction band minimum for GaN. The insertion of a 3-nm-thick SiO2 IL drastically enhanced the effective mobility and simultaneously reduced the ΔVt value. Hall effect measurements with an applied gate voltage were used to determine the mobility of free electrons while excluding electrons captured in the border traps. The Hall effect mobility was much higher than the effective mobility, indicating that mobility was in fact reduced by the capture of electrons by the border traps. The ratio of electrons captured by border traps to the overall electrons induced by a gate bias was greatly lowered in a MOSFET incorporating a SiO2 IL. When a high vertical electric field of approximately 1 MV/cm was present in the device channel, the Hall effect mobility was slightly increased following the insertion of an IL. These results suggest that the IL reduced the interfacial roughness and/or affected the screening out of scattering due to potential fluctuations of the AlSiO.
Funding Information
  • Ministry of Education, Culture, Sports, Science and Technology (JPJ005357)

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