Aspect Ratio Estimation for MOS Amplifier using Machine Learning

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Abstract
Conventional analog circuit design is complicated due to non-linearity. Due to which the design process was more complex in terms of hand calculations and was time-consuming. This paper estimate the aspect ratio for MOSFET based Common Source Amplifier with Diode connected load using machine learning techniques like Neural Network (NN), General Regression Neural Network (GRNN), Support Vector Regression (SVR) and Decision Tree Regression. The aim is to predict the size of the transistors of the circuit according to the corresponding design constraints or design parameters, without the knowledge of SPICE technology parameters. The designed models were trained using 180 nm and 250 nm technology nodes. These models take parameters like Voltage Gain, Power Dissipation, Power Supply, and Input Impedance as input and give the sizes of transistors as output. As the design constraints were applied to these techniques, the Neural Network provided the most accurate size of the transistors as an output with maximum accuracy of 97.49%.