A Fault Simulator for MOS LSI Circuits
Authors:
- A.K. BoseABA.K. Bose
- P. KozakPKP. Kozak
- C.-Y. LoCLC.-Y. Lo
- H.N. NhamHNH.N. Nham
- E. Pacas-SkewesEPE. Pacas-Skewes
- K. WuKWK. Wu
- 1 January 1982
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 400-409
Abstract
No abstract availableKeywords
This publication has 5 references indexed in Scilit:
- MOSSIM: A Switch-Level Simulator for MOS LSI1981
- Physical Versus Logical Fault Models MOS LSI Circuits: Impact on Their TestabilityIEEE Transactions on Computers, 1980
- Fault Modeling and Logic Simulation of CMOS and MOS Integrated CircuitsBell System Technical Journal, 1978
- MOTIS-An MOS timing simulatorIEEE Transactions on Circuits and Systems, 1975
- Concurrent simulation of nearly identical digital networksComputer, 1974