Hierarchical Temporal Memory Based on Spin-Neurons and Resistive Memory for Energy-Efficient Brain-Inspired Computing
Authors:
Open Access
- 14 August 2015
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Neural Networks and Learning Systems
- Vol. 27 (9) , 1907-1919
Abstract
Hierarchical temporal memory (HTM) tries to mimic the computing in cerebral neocortex. It identifies spatial and temporal patterns in the input for making inferences. This may require a large number of computationally expensive tasks, such as dot product evaluations. Nanodevices that can provide direct mapping for such primitives are of great interest. In this paper, we propose that the computing blocks for HTM can be mapped using low-voltage, magnetometallic spin-neurons combined with an emerging resistive crossbar network, which involves a comprehensive design at algorithm, architecture, circuit, and device levels. Simulation results show the possibility of more than 200× lower energy as compared with a 45-nm CMOS ASIC design.Keywords
All Related Versions
Funding Information
- National Science Foundation
- Semiconductor Research Corporation
- Defense Advanced Research Projects Agency through unconventional processing of signals for intelligent data exploitation
- Intel Corporation
- Center for Spintronics: Materials, Interfaces, and Architecture, StarNet Center
- Department of Defense National Security Science and Engineering Faculty Fellowship Fellow Program
This publication has 44 references indexed in Scilit:
- Ultralow-current-density and bias-field-free spin-transfer nano-oscillatorScientific Reports, 2013
- A high precision low dropout regulator with nested feedback loopsMicroelectronics Journal, 2011
- Fast current-induced domain-wall motion controlled by the Rashba effectNature Materials, 2011
- Low power current-mode binary-tree asynchronous Min/Max circuitMicroelectronics Journal, 2009
- Towards a Mathematical Theory of Cortical Micro-circuitsPLOS Computational Biology, 2009
- High-Density Crossbar Arrays Based on a Si Memristive SystemNano Letters, 2009
- CMOS Compatible Nanoscale Nonvolatile Resistance Switching MemoryNano Letters, 2008
- Neuromorphic architectures for nanoelectronic circuitsInternational Journal of Circuit Theory and Applications, 2004
- Heteroassociations of spatio-temporal sequences with the bidirectional associative memoryIEEE Transactions on Neural Networks, 2000
- Information Processing in the Primate Visual System: An Integrated Systems PerspectiveScience, 1992