Feedforward Phase Noise Cancellation Exploiting a Sub-Sampling Phase Detector
- 18 October 2017
- journal article
- research article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Circuits and Systems II: Express Briefs
- Vol. 65 (11) , 1574-1578
Abstract
This paper presents a feedforward phase noise cancellation technique to reduce phase noise of the output clock signal of a phase-locked loop (PLL). It uses a sub-sampling phase detector to measure the phase noise and a variable time delay for cancellation. Both phase noise and spurs are reduced. Analytical expressions have been derived that characterize the performance of this technique and show its fundamental limitations. A sub-sampling phase-locked loop with the cancellation technique as a built-in feature is described. The feedforward technique has no stability requirements in contrast to conventional PLL architectures. The phase noise reduction bandwidth is increased to almost a third of the reference frequency — 3x the maximal bandwidth for 3rd order type-II PLLs. The proposed analytical model shows a phase noise reduction of 9 dB at a frequency offset of fref/10. The total rms jitter is improved by 7.2 dB. The analytical results are verified by simulations.Keywords
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