Abstract
This paper particularly explains potential-induced degradation (PID) of wafer-based standard p-type crystalline silicon technology. We present a single-encapsulation method that is useful for simulating PID in the laboratory to facilitate microanalyses of module-level solar cells. The PID testing is performed for the module with single-encapsulation and conventional modules. Their current–voltage characteristics and electroluminescence images are investigated before and after the PID tests. As described herein, we infer that the single-encapsulation modules generate PID almost in the same way as conventional modules do, and that the degradation trend is almost identical to that of conventional modules. Results of PID recovery tests indicate that the time necessary for PID recovery is always less than that for PID generation, irrespective of the encapsulation method.

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