Enhancement-Mode AlN/GaN HFETs Using Cat-CVD SiN
Authors:
- Masataka HigashiwakiMHMasataka Higashiwaki
- Takashi MimuraTMTakashi Mimura
- Toshiaki MatsuiTMToshiaki Matsui
- 29 May 2007
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 54 (6) , 1566-1570
Abstract
High-performance enhancement-mode (E-mode) AIN (2.5 nm)/GaN heterostructure field-effect transistors (HFETs) were fabricated with a novel method using SiN passivation by catalytic chemical vapor deposition (Cat-CVD). We found that the formation of a 2-D electron gas (2DEG) in the AIN/GaN heterostructure can be controlled by the presence of the Cat-CVD SiN on the barrier layer. Before SiN deposition, the 2DEG at the AIN/GaN heterointerface was completely depleted because of the extremely thin barrier layer. On the other hand, after SiN deposition, the decrease in AIN surface barrier height induced a high-density 2DEG. The E-mode HFETs with gate lengths of 100-180 nm and threshold voltages from +0.14 to +0.55 V showed a maximum drain-current density of 0.70-0.92 A/mm and a maximum extrinsic transconductance of 362-400 mS/mm. A current-gain cutoff frequency of 87 GHz and maximum oscillation frequency of 149 GHz were obtained for the 100-nm-gate devices.Keywords
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