Polyhedral-Model Guided Loop-Nest Auto-Vectorization
Authors:
- Konrad TrifunovicKTKonrad Trifunovic
- Dorit NuzmanDNDorit Nuzman
- Albert CohenACAlbert Cohen
- Ayal ZaksAZAyal Zaks
- Ira RosenIRIra Rosen
- 1 September 2009
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 1089795X,p. 327-337
Abstract
Optimizing compilers apply numerous interdependent optimizations, leading to the notoriously difficult phase-ordering problem - that of deciding which transformations to apply and in which order. Fortunately, new infrastructures such as the polyhedral compilation framework host a variety of transformations, facilitating the efficient exploration and configuration of multiple transformation sequences. Many powerful optimizations, however, remain external to the polyhedral framework, including vectorization. The low-level, target-specific aspects of vectorization for fine-grain SIMD has so far excluded it from being part of the polyhedral framework. In this paper we examine the interactions between loop transformations of the polyhedral framework and subsequent vectorization. We model the performance impact of the different loop transformations and vectorization strategies, and then show how this cost model can be integrated seamlessly into the polyhedral representation. This predictive modelling facilitates efficient exploration and educated decision making to best apply various polyhedral loop transformations while considering the subsequent effects of different vectorization schemes. Our work demonstrates the feasibility and benefit of tuning the polyhedral model in the context of vectorization. Experimental results confirm that our model has accurate predictions, providing speedups of over 2.0times on average over traditional innermost-loop vectorization on PowerPC970 and Cell-SPU SIMD platforms.Keywords
This publication has 19 references indexed in Scilit:
- Auto-vectorization of interleaved data for SIMD2006
- Semi-Automatic Composition of Loop Transformations for Deep Parallelism and Memory HierarchiesInternational Journal of Parallel Programming, 2006
- An integrated simdization framework using virtual vectors2005
- Code generation in the polyhedral model is easier than you think2004
- Probabilistic miss equations: evaluating memory hierarchy performanceIEEE Transactions on Computers, 2003
- Maximizing parallelism and minimizing synchronization with affine transforms1997
- (Pen)-ultimate tiling?Integration, 1994
- Some efficient solutions to the affine scheduling problem. Part II. Multidimensional timeInternational Journal of Parallel Programming, 1992
- Array expansion1988
- Automatic translation of FORTRAN programs to vector formACM Transactions on Programming Languages and Systems, 1987