A Reliable, Time-Predictable Heterogeneous SoC for AI-Enhanced Mixed-Criticality Edge Applications
Authors:
- Angelo GarofaloAGAngelo Garofalo
- Alessandro OttavianoAOAlessandro Ottaviano
- Matteo PerottiMPMatteo Perotti
- Thomas BenzTBThomas Benz
- Yvan TortorellaYTYvan Tortorella
- Robert BalasRBRobert Balas
- Michael RogenmoserMRMichael Rogenmoser
- Chi ZhangCZChi Zhang
- Luca BertacciniLBLuca Bertaccini
- Nils WistoffNWNils Wistoff
- Maicol CianiMCMaicol Ciani
- Cyril KoenigCKCyril Koenig
Preprint
Abstract
Next-generation mixed-criticality Systems-on-chip (SoCs) for robotics, automotive, and space must execute mixed-criticality AI-enhanced sensor processing and control workloads, ensuring reliable and time-predictable execution of critical tasks sharing resources with non-critical tasks, while also fitting within a sub-2W power envelope. To tackle these multi-dimensional challenges, in this brief, we present a 16nm, reliable, time-predictable heterogeneous SoC with multiple programmable accelerators. Within a 1.2W power envelope, the SoC integrates software-configurable hardware IPs to ensure predictable access to shared resources, such as the on-chip interconnect and memory system, leading to tight upper bounds on execution times of critical applications. To accelerate mixed-precision mission-critical AI, the SoC integrates a reliable multi-core accelerator achieving 304.9 GOPS peak performance at 1.6 TOPS/W energy efficiency. Non-critical, compute-intensive, floating-point workloads are accelerated by a dual-core vector cluster, achieving 121.8 GFLOPS at 1.1 TFLOPS/W and 106.8 GFLOPS/mm2.Keywords
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