A Calibration-Free, Reference-Buffer-Free, Type-I Narrow-Pulse-Sampling PLL With −78.7-dBc REF Spur, −128.1-dBc/Hz Absolute In-Band PN and −254-dB FOM
- 19 October 2020
- journal article
- research article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Solid-State Circuits Letters
- Vol. 3, 494-497
Abstract
This letter presents a type-I Narrow-Pulse-Sampling (NPS) phase-locked loop (PLL). It features a circuit technique: NPS phase detector + T-shape switch, to address the main spurrelated non-idealities. Fabricated in 28-nm CMOS, the NPS-PLL operating at 3.3 GHz measures a -78.7-dBc reference spur and a -128.1-dBc/Hz absolute in-band phase noise at 1-MHz offset for a jitter-power Figure-of-Merit (FOM) of -254 dB, without the need of calibration and reference buffer.Keywords
Funding Information
- Guangzhou Science and Technology Innovation and Development of Special Funds (EF002/IME-CY/2019/GSTIC)
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