Blas Garrido

In this work, the optoelectronic properties of silicon light emitting field-effect transistors (LEFETs) have been investigated. The devices have been fabricated with silicon nanocrystals in the gate oxide and a semitransparent polycrystalline silicon gate. We compare the properties of LEFET with a more conventional MOS-LED (two-terminal light-emitting capacitor) with the same active material. The ~45 nm thick gate siliconrich oxide is deposited in a size-controlled multilayer geometry by low pressure chemical vapor deposition using standard microelectronic processes in a CMOS line. The multilayer stack is formed by layers of silicon oxide and silicon rich silicon oxide. The nanocrystal size and the tunneling barrier width are controlled by the thickness of silicon-rich silicon oxide and stochiometric silicon oxide layers, respectively. The silicon nanocrystals have been characterized by means of spectrally and time resolved photoluminescence, high resolution TEM, and x-ray photoelectron spectroscopy. Resistivity of the devices, capacitance, and electroluminescence under direct and pulsed injection current scheme have been studied and here reported. The optical power density and the external quantum efficiency of the LEFETs will be compared with the MOSLED results. This study will help to develop practical optoelectronic and photonic devices via accurate modeling and engineering of charge transport and exciton recombination in silicon nanocrystal arrays.

The convergence of photonics and microelectronics within a single chip is still lacking of a monolithical on-chip optical amplifier. Rare-earth doped slot waveguides show a large potential as on-chip source. Slot waveguides with silicon nanocrystals embedded in a dielectric host matrix can increase the light confinement in the active layer and allow electrical injection. In this work, horizontal slot waveguides formed by two thick silicon layers separated by a thin erbium doped silicon rich silicon oxide layer are studied as on-chip optical amplifiers. The waveguides are grown in a CMOS line with the active material grown by low-pressure chemical vapor deposition. Optical tests are performed and light propagation in the slot waveguides is observed. Using the cut-back technique, spectra propagation losses are evaluated. Room temperature electroluminescence is observed at 1.54 μm. Transmitted optical signal resonant with Er absorption is studied as a function of the injected current for different probing laser wavelengths.

This study investigates the influence of the film thickness on the silicon-excess-mediated sensitization of Erbium ions in Si-rich silica. The Er³⁺ photoluminescence at 1.5 μm, normalized to the film thickness, was found five times larger for films 1 μm-thick than that from 50-nm-thick films intended for electrically driven devices. The origin of this difference is shared by changes in the local density of optical states and depth-dependent interferences, and by limited formation of Si-based sensitizers in "thin" films, probably because of the prevailing high stress. More Si excess has significantly increased the emission from "thin" films, up to ten times. This paves the way to the realization of highly efficient electrically excited devices.

Silicon photonics have generated an increasing interest in the recent year, mainly for optical telecommunications or for optical interconnects in microelectronic circuits. The rationale of silicon photonics is the reduction of the cost of photonic systems through the integration of photonic components and an IC on a common chip, or in the longer term, the enhancement of IC performance with the introduction of optics inside a high performance chip. In order to build a Opto-Electronic Integrated circuit (OEIC), a large European project HELIOS has been launched two years ago. The objective is to combine a photonic layer with a CMOS circuit by different innovative means, using microelectronics fabrication processes. High performance generic building blocks that can be used for a broad range of applications are developed such as WDM sources by III-V/Si heterogeneous integration, fast Si modulators and Ge or InGaAs detectors, Si passive circuits and specific packaging. Different scenari for integrating photonic with an electronic chip and the recent advances on the building blocks of the Helios project are presented.

Slot and sandwiched waveguides with silicon nanocrystals were fabricated by means of industrial microelectronic tools, including DUV lithography. Low loss of 4 dB/cm will pave the way to compact all-optical NOR logic gates.