Hugo Bender
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Previous Organizations / Institutes
The organizations / institutes from the scholar's other articles in the past ten years
Hugo Bender has a total of 311 co-authors. Here are the top co-authors by number of shared publications:
- Paola Favia
IMEC, Leuven, Belgium
14 shared publications - Roger Loo
IMEC, Leuven, Belgium
11 shared publications - Eddy Simoen
Ghent University, Ghent, Belgium
8 shared publications - Geert Eneman
IMEC, Leuven, Belgium
7 shared publications - Olivier Richard
IMEC
7 shared publications - Andriy Hikavyy
Imec, Kapeldreef 75, 3001 Leuven, Belgium
6 shared publications
Latest Publications
- Open Access
- 11 August 2020
- Published by MDPI AG in Nanomaterials
- Vol. 10 (8) , 1576
Ferroelectricity in Si-Doped Hafnia: Probing Challenges in Absence of Screening Charges
The ability to develop ferroelectric materials using binary oxides is critical to enable novel low-power, high-density non-volatile memory and fast switching logic. The discovery of ferroelectricity in hafnia-based thin films, has focused the hopes of the community on this class of materials to overcome the existing problems of perovskite-based integrated ferroelectrics. However, both the control of ferroelectricity in doped-HfO2 and the direct characterization at the nanoscale of ferroelectric phenomena, are increasingly difficult to achieve. The main limitations are imposed by the inherent intertwining of ferroelectric and dielectric properties, the role of strain, interfaces and electric field-mediated phase, and polarization changes. In this work, using Si-doped HfO2 as a material system, we performed a correlative study with four scanning probe techniques for the local sensing of intrinsic ferroelectricity on the oxide surface. Putting each technique in perspective, we demonstrated that different origins of spatially resolved contrast can be obtained, thus highlighting possible crosstalk not originated by a genuine ferroelectric response. By leveraging the strength of each method, we showed how intrinsic processes in ultrathin dielectrics, i.e., electronic leakage, existence and generation of energy states, charge trapping (de-trapping) phenomena, and electrochemical effects, can influence the sensed response. We then proceeded to initiate hysteresis loops by means of tip-induced spectroscopic cycling (i.e., “wake-up”), thus observing the onset of oxide degradation processes associated with this step. Finally, direct piezoelectric effects were studied using the high pressure resulting from the probe’s confinement, noticing the absence of a net time-invariant piezo-generated charge. Our results are critical in providing a general framework of interpretation for multiple nanoscale processes impacting ferroelectricity in doped-hafnia and strategies for sensing it.
- 11 August 2020
- Published by MDPI AG in Nanomaterials
- Vol. 10 (8) , 1576
Open AccessFerroelectricity in Si-Doped Hafnia: Probing Challenges in Absence of Screening Charges
The ability to develop ferroelectric materials using binary oxides is critical to enable novel low-power, high-density non-volatile memory and fast switching logic. The discovery of ferroelectricity in hafnia-based thin films, has focused the hopes of the community on this class of materials to overcome the existing problems of perovskite-based integrated ferroelectrics. However, both the control of ferroelectricity in doped-HfO2 and the direct characterization at the nanoscale of ferroelectric phenomena, are increasingly difficult to achieve. The main limitations are imposed by the inherent intertwining of ferroelectric and dielectric properties, the role of strain, interfaces and electric field-mediated phase, and polarization changes. In this work, using Si-doped HfO2 as a material system, we performed a correlative study with four scanning probe techniques for the local sensing of intrinsic ferroelectricity on the oxide surface. Putting each technique in perspective, we demonstrated that different origins of spatially resolved contrast can be obtained, thus highlighting possible crosstalk not originated by a genuine ferroelectric response. By leveraging the strength of each method, we showed how intrinsic processes in ultrathin dielectrics, i.e., electronic leakage, existence and generation of energy states, charge trapping (de-trapping) phenomena, and electrochemical effects, can influence the sensed response. We then proceeded to initiate hysteresis loops by means of tip-induced spectroscopic cycling (i.e., “wake-up”), thus observing the onset of oxide degradation processes associated with this step. Finally, direct piezoelectric effects were studied using the high pressure resulting from the probe’s confinement, noticing the absence of a net time-invariant piezo-generated charge. Our results are critical in providing a general framework of interpretation for multiple nanoscale processes impacting ferroelectricity in doped-hafnia and strategies for sensing it.
- 7 August 2020
- Published by IOP Publishing in Nanotechnology
- Vol. 31 (44) , 445702
Unravelling stacking order in epitaxial bilayer MX 2 using 4D-STEM with unsupervised learning
Following an extensive investigation of various monolayer transition metal dichalcogenides (MX 2 ), research interest has expanded to include multilayer systems. In bilayer MX 2 , the stacking order strongly impacts the local band structure as it dictates the local confinement and symmetry. Determination of stacking order in multilayer MX 2 domains usually relies on prior knowledge of in-plane orientations of constituent layers. This is only feasible in case of growth resulting in well-defined triangular domains and not useful in-case of closed layers with hexagonal or irregularly shaped islands. Stacking order can be discerned in the reciprocal space by measuring changes in diffraction peak intensities. Advances in detector technology allow fast acquisition of high-quality four-dimensional datasets which can later be processed to extract useful information such as thickness, orientation, twist and strain. Here, we use 4D scanning transmission electron microscopy combined with multislice diffraction simulations to unravel stacking order in epitaxially grown bilayer MoS 2 . Machine learning based data segmentation is employed to obtain useful statistics on grain orientation of monolayer and stacking in bilayer MoS 2 .
- 7 August 2020
- Published by IOP Publishing in Nanotechnology
- Vol. 31 (44) , 445702
Unravelling stacking order in epitaxial bilayer MX 2 using 4D-STEM with unsupervised learning
Following an extensive investigation of various monolayer transition metal dichalcogenides (MX 2 ), research interest has expanded to include multilayer systems. In bilayer MX 2 , the stacking order strongly impacts the local band structure as it dictates the local confinement and symmetry. Determination of stacking order in multilayer MX 2 domains usually relies on prior knowledge of in-plane orientations of constituent layers. This is only feasible in case of growth resulting in well-defined triangular domains and not useful in-case of closed layers with hexagonal or irregularly shaped islands. Stacking order can be discerned in the reciprocal space by measuring changes in diffraction peak intensities. Advances in detector technology allow fast acquisition of high-quality four-dimensional datasets which can later be processed to extract useful information such as thickness, orientation, twist and strain. Here, we use 4D scanning transmission electron microscopy combined with multislice diffraction simulations to unravel stacking order in epitaxially grown bilayer MoS 2 . Machine learning based data segmentation is employed to obtain useful statistics on grain orientation of monolayer and stacking in bilayer MoS 2 .
- 11 February 2020
- Published by IOP Publishing in Semiconductor Science and Technology
- Vol. 35 (3) , 034002
Strain measurement in semiconductor FinFET devices using a novel moiré demodulation technique
Moiré fringes are used throughout a wide variety of applications in physics and engineering to bring out small variations in an underlying lattice by comparing with another reference lattice. This method was recently demonstrated in scanning transmission electron microscopy imaging to provide local strain measurement in crystals by comparing the crystal lattice with the scanning raster that then serves as the reference. The images obtained in this way contain a beating fringe pattern with a local period that represents the deviation of the lattice from the reference. In order to obtain the actual strain value, a region containing a full period of the fringe is required, which results in a compromise between strain sensitivity and spatial resolution. In this paper we propose an advanced setup making use of an optimised scanning pattern and a novel phase stepping demodulation scheme. We demonstrate the novel method on a series of 16 nm Si–Ge semiconductor FinFET devices in which strain plays a crucial role in modulating the charge carrier mobility. The obtained results are compared with both Nano-beam diffraction and the recently proposed Bessel beam diffraction technique. The setup provides a much improved spatial resolution over conventional moiré imaging in STEM while at the same time being fast and requiring no specialised diffraction camera as opposed to the diffraction techniques we compare to.
- 11 February 2020
- Published by IOP Publishing in Semiconductor Science and Technology
- Vol. 35 (3) , 034002
Strain measurement in semiconductor FinFET devices using a novel moiré demodulation technique
Moiré fringes are used throughout a wide variety of applications in physics and engineering to bring out small variations in an underlying lattice by comparing with another reference lattice. This method was recently demonstrated in scanning transmission electron microscopy imaging to provide local strain measurement in crystals by comparing the crystal lattice with the scanning raster that then serves as the reference. The images obtained in this way contain a beating fringe pattern with a local period that represents the deviation of the lattice from the reference. In order to obtain the actual strain value, a region containing a full period of the fringe is required, which results in a compromise between strain sensitivity and spatial resolution. In this paper we propose an advanced setup making use of an optimised scanning pattern and a novel phase stepping demodulation scheme. We demonstrate the novel method on a series of 16 nm Si–Ge semiconductor FinFET devices in which strain plays a crucial role in modulating the charge carrier mobility. The obtained results are compared with both Nano-beam diffraction and the recently proposed Bessel beam diffraction technique. The setup provides a much improved spatial resolution over conventional moiré imaging in STEM while at the same time being fast and requiring no specialised diffraction camera as opposed to the diffraction techniques we compare to.
- 1 December 2019
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 11.1.1-11.1.4
Vertical Nanowire and Nanosheet FETs: Device Features, Novel Schemes for Improved Process Control and Enhanced Mobility, Potential for Faster & More Energy Efficient Circuits
We report on p and n-type vertical gate-all-around (GAA) nanowire (NW) and nanosheet (NS) FETs which offer attractive opportunities for ultra-scaled circuits. An in-depth evaluation is presented on the impact of doping and key device dimensions to improve the performance, variability, noise and reliability behavior for junctionless (JL) vs. inversion-mode (IM) vertical FETs built with an RMG scheme. The latter enables a novel concept to introduce stress in VFETs for enhanced mobility with up to a19% higher I ON predicted. SiGe/Si pillars and self-aligned spacers offer a solution to gate vertical (mis)alignment towards the S/D. As MRAM selector, VNS FETs can allow substantial area reduction (64% for 2VNS per cell; 3nm node design rules) vs. finFET based cells, with smaller read/write energy consumption and latency times.
- 1 December 2019
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 11.1.1-11.1.4
Vertical Nanowire and Nanosheet FETs: Device Features, Novel Schemes for Improved Process Control and Enhanced Mobility, Potential for Faster & More Energy Efficient Circuits
We report on p and n-type vertical gate-all-around (GAA) nanowire (NW) and nanosheet (NS) FETs which offer attractive opportunities for ultra-scaled circuits. An in-depth evaluation is presented on the impact of doping and key device dimensions to improve the performance, variability, noise and reliability behavior for junctionless (JL) vs. inversion-mode (IM) vertical FETs built with an RMG scheme. The latter enables a novel concept to introduce stress in VFETs for enhanced mobility with up to a19% higher I ON predicted. SiGe/Si pillars and self-aligned spacers offer a solution to gate vertical (mis)alignment towards the S/D. As MRAM selector, VNS FETs can allow substantial area reduction (64% for 2VNS per cell; 3nm node design rules) vs. finFET based cells, with smaller read/write energy consumption and latency times.
- 4 November 2019
- Published by IOP Publishing in Semiconductor Science and Technology
- Vol. 34 (12) , 124003
TEM investigations of gate-all-around nanowire devices
Vertically stacked gate-all-around nanowires (GAA NWs) are considered a promising architecture for ultimately scaled complementary metal oxide semiconductor devices. These are the natural evolution of the fin-shaped field effect transistor (finFET) design and enable a better electrostatic control and a higher drive current per footprint w.r.t. previous architectures. Transmission electron microscopy (TEM) analysis is employed in the development stages of these devices to investigate morphology, material diffusion, oxidation and strain in order to achieve the desired nanowires shape and size and the required performances. Nano beam diffraction and geometric phase analysis of high-resolution scanning TEM (STEM) images are used in this work to evaluate strain at the nm-scale along the nanowires at different steps of the fabrication process. Initially strained Ge layers, in the early stages of the GAA NWs fabrication, relax after the fin-reveal and source/drain etching process steps. Strain is then restored after source/drain epitaxial deposition and maintained till the NWs release. TEM analyses of these structures are particularly challenging due to the dimensions of the GAA NWs which are smaller than the thickness of a typical TEM specimen. This generates artifacts due to different materials and multiple structures overlapping in projection in TEM images. To avoid these issues, several TEM lamellae at different positions in the device and/or 3D imaging STEM/energy dispersive spectroscopy tomography are employed.
- 4 November 2019
- Published by IOP Publishing in Semiconductor Science and Technology
- Vol. 34 (12) , 124003
TEM investigations of gate-all-around nanowire devices
Vertically stacked gate-all-around nanowires (GAA NWs) are considered a promising architecture for ultimately scaled complementary metal oxide semiconductor devices. These are the natural evolution of the fin-shaped field effect transistor (finFET) design and enable a better electrostatic control and a higher drive current per footprint w.r.t. previous architectures. Transmission electron microscopy (TEM) analysis is employed in the development stages of these devices to investigate morphology, material diffusion, oxidation and strain in order to achieve the desired nanowires shape and size and the required performances. Nano beam diffraction and geometric phase analysis of high-resolution scanning TEM (STEM) images are used in this work to evaluate strain at the nm-scale along the nanowires at different steps of the fabrication process. Initially strained Ge layers, in the early stages of the GAA NWs fabrication, relax after the fin-reveal and source/drain etching process steps. Strain is then restored after source/drain epitaxial deposition and maintained till the NWs release. TEM analyses of these structures are particularly challenging due to the dimensions of the GAA NWs which are smaller than the thickness of a typical TEM specimen. This generates artifacts due to different materials and multiple structures overlapping in projection in TEM images. To avoid these issues, several TEM lamellae at different positions in the device and/or 3D imaging STEM/energy dispersive spectroscopy tomography are employed.
- 25 October 2019
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Quantum Electronics
- Vol. 56 (1) , 1-7
High Absorption Contrast Quantum Confined Stark Effect in Ultra-Thin Ge/SiGe Quantum Well Stacks Grown on Si
We report on the performance of the quantum confined Stark effect (QCSE) in ultra-thin (~350 nm) Ge/SiGe quantum well stacks grown on Si. We demonstrate an absorption contrast Δα/α of 2.1 at 1 Vpp swing in QCSE stacks grown on ultra-thin (100 nm) strain relaxed GeSi buffer layers on 300 mm Si wafers. Such ultra-thin QCSE stacks will enable future integration of highly efficient QCSE electro-absorption modulators with low optical coupling loss to passive Si waveguides in a sub-micron silicon photonics platform.
- 25 October 2019
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Quantum Electronics
- Vol. 56 (1) , 1-7
High Absorption Contrast Quantum Confined Stark Effect in Ultra-Thin Ge/SiGe Quantum Well Stacks Grown on Si
We report on the performance of the quantum confined Stark effect (QCSE) in ultra-thin (~350 nm) Ge/SiGe quantum well stacks grown on Si. We demonstrate an absorption contrast Δα/α of 2.1 at 1 Vpp swing in QCSE stacks grown on ultra-thin (100 nm) strain relaxed GeSi buffer layers on 300 mm Si wafers. Such ultra-thin QCSE stacks will enable future integration of highly efficient QCSE electro-absorption modulators with low optical coupling loss to passive Si waveguides in a sub-micron silicon photonics platform.
- 17 October 2019
- Published by IOP Publishing in Semiconductor Science and Technology
- Vol. 34 (11) , 114002
Combined STEM-EDS tomography of nanowire structures
The 3D spatial resolution, the material contrast and the evolution of the noise are analyzed in the reconstructed volume of a combined scanning transmission electron microscopy (HAADF-STEM) and energy dispersive x-ray spectroscopy (EDS) tomography experiment. Standard simultaneous iterative reconstruction technique and HAADF-EDS bimodal tomographic reconstruction are considered for the +/−90° tomography series of a pillar shaped sample embedding a full nanowire device. With a high number of iterations, a spatial resolution for both HAADF and EDS down to 5 nanometer can be reached for this volume. Best material’s contrast and minimum noise are obtained for medium number of iterations. Improvement of the signal-to-noise and contrast can be obtained by filtering the EDS data while the spatial resolution is not impacted. A fast and reliable preparation methodology for rectangularly shaped pillar samples for tomography analysis is discussed.
- 17 October 2019
- Published by IOP Publishing in Semiconductor Science and Technology
- Vol. 34 (11) , 114002
Combined STEM-EDS tomography of nanowire structures
The 3D spatial resolution, the material contrast and the evolution of the noise are analyzed in the reconstructed volume of a combined scanning transmission electron microscopy (HAADF-STEM) and energy dispersive x-ray spectroscopy (EDS) tomography experiment. Standard simultaneous iterative reconstruction technique and HAADF-EDS bimodal tomographic reconstruction are considered for the +/−90° tomography series of a pillar shaped sample embedding a full nanowire device. With a high number of iterations, a spatial resolution for both HAADF and EDS down to 5 nanometer can be reached for this volume. Best material’s contrast and minimum noise are obtained for medium number of iterations. Improvement of the signal-to-noise and contrast can be obtained by filtering the EDS data while the spatial resolution is not impacted. A fast and reliable preparation methodology for rectangularly shaped pillar samples for tomography analysis is discussed.
- 10 October 2019
- Published by IOP Publishing in Semiconductor Science and Technology
- Vol. 34 (11) , 114001
3D characterization of nanowire devices with STEM based modes
Advanced semiconductor devices have 3D morphologies with nanometer sized features. Therefore, their structural and chemical characterization requires analysis techniques with high spatial 3D resolution. Through focal integrated differential phase contrast and high angle annular dark field scanning transmission electron microscopy (STEM) depth sectioning are among the techniques that can potentially fulfill these needs. In this work they are applied to Si and Ge nanowire structures with gate all around replacement metal gates. It is shown that with both imaging modes slicing with 2D lattice resolution through the polycrystalline gate stack and the monocrystalline wires is possible, while a resolution in the viewing direction on the order of 5 nm is obtained. Based on fast Fourier transformation analysis the crystal distribution in the gate stack and morphology of the nanowires are analyzed. Similar structures are investigated with combined STEM-energy dispersive spectroscopy 180° tomography on pillar shaped TEM specimens. Comparison of the 3D imaging modes and standard TEM/STEM imaging is discussed.
- 10 October 2019
- Published by IOP Publishing in Semiconductor Science and Technology
- Vol. 34 (11) , 114001
3D characterization of nanowire devices with STEM based modes
Advanced semiconductor devices have 3D morphologies with nanometer sized features. Therefore, their structural and chemical characterization requires analysis techniques with high spatial 3D resolution. Through focal integrated differential phase contrast and high angle annular dark field scanning transmission electron microscopy (STEM) depth sectioning are among the techniques that can potentially fulfill these needs. In this work they are applied to Si and Ge nanowire structures with gate all around replacement metal gates. It is shown that with both imaging modes slicing with 2D lattice resolution through the polycrystalline gate stack and the monocrystalline wires is possible, while a resolution in the viewing direction on the order of 5 nm is obtained. Based on fast Fourier transformation analysis the crystal distribution in the gate stack and morphology of the nanowires are analyzed. Similar structures are investigated with combined STEM-energy dispersive spectroscopy 180° tomography on pillar shaped TEM specimens. Comparison of the 3D imaging modes and standard TEM/STEM imaging is discussed.
- 20 July 2018
- Published by The Electrochemical Society in ECS Transactions
- Vol. 86 (7) , 311-320
(Invited) Raman Stress Measurements at the Nanoscale
In semiconductor technology, mechanical stress is one of the principal performance boosters available to device engineering for the development of state-of-the-art logic transistors. Currently available strain characterization techniques are either destructive or have low spatial resolution because they use broad beams (Raman, X-ray diffraction). Fast, accurate and non-invasive stress measurements beyond the diffraction limit remain a challenge. However, it was recently found that the geometry of the structure itself can be used as an enhancement tool to bring out the relevant Raman signals from the region of interest. The theoretical understanding of the effect was fine-tuned such that the concept can be applied on the materials and structures of choice. Recently a strategy was developed to extract detailed and quantitative stress values of deep sub-wavelength semiconductor structures. The approach enables the quick and non-invasive quantitative characterization of stress inside CMOS devices of the next generation.
- 20 July 2018
- Published by The Electrochemical Society in ECS Transactions
- Vol. 86 (7) , 311-320
(Invited) Raman Stress Measurements at the Nanoscale
In semiconductor technology, mechanical stress is one of the principal performance boosters available to device engineering for the development of state-of-the-art logic transistors. Currently available strain characterization techniques are either destructive or have low spatial resolution because they use broad beams (Raman, X-ray diffraction). Fast, accurate and non-invasive stress measurements beyond the diffraction limit remain a challenge. However, it was recently found that the geometry of the structure itself can be used as an enhancement tool to bring out the relevant Raman signals from the region of interest. The theoretical understanding of the effect was fine-tuned such that the concept can be applied on the materials and structures of choice. Recently a strategy was developed to extract detailed and quantitative stress values of deep sub-wavelength semiconductor structures. The approach enables the quick and non-invasive quantitative characterization of stress inside CMOS devices of the next generation.
- 2 February 2018
- Published by Tsinghua University Press in Nano Research
- Vol. 11 (8) , 4017-4025
Voltage-controlled reverse filament growth boosts resistive switching memory
Nonvolatile memory devices based on filamentary resistance switching (RS) areamong the frontrunners to fuel future devices and sensors of the internet of things (IoT) era. The capability of many metal-insulator-metal cells to switch between two distinctive resistive states in response to an external electrical stimulus has been demonstrated. Through years of selection, cells based on the drift of metal ions, namely conductive-bridge memory devices, have shown a wide range of applications with nanosecond switching speeds, nanometer scalability,high-density, and low power-consumption. However, for low (sub-10-μA) current operation, a critical challenge is still represented by programming variability and by the stability of the conductive filament over time. Here, by introducing the concept of reverse filament growth (RFG), we managed to control the structural reconfiguration of the conductive filament inside a memory cell with significant enhancements of each of the aforementioned properties. A first-in-class Cu-based switching device is demonstrated, with a dedicated stack that enabled us to systematically trigger RFG, thus tuning the device’s properties. Along with nanosecond switching speeds, we achieved an endurance of up to 106 cycles with a 102 read window, with outstanding disturb immunity and optimal stability of the filament over time. Furthermore, by tuning the filament’s shape, an excellent control of multi-level bit operations was achieved. Thus, this device offers high flexibility in memory applications.
- 2 February 2018
- Published by Tsinghua University Press in Nano Research
- Vol. 11 (8) , 4017-4025
Voltage-controlled reverse filament growth boosts resistive switching memory
Nonvolatile memory devices based on filamentary resistance switching (RS) areamong the frontrunners to fuel future devices and sensors of the internet of things (IoT) era. The capability of many metal-insulator-metal cells to switch between two distinctive resistive states in response to an external electrical stimulus has been demonstrated. Through years of selection, cells based on the drift of metal ions, namely conductive-bridge memory devices, have shown a wide range of applications with nanosecond switching speeds, nanometer scalability,high-density, and low power-consumption. However, for low (sub-10-μA) current operation, a critical challenge is still represented by programming variability and by the stability of the conductive filament over time. Here, by introducing the concept of reverse filament growth (RFG), we managed to control the structural reconfiguration of the conductive filament inside a memory cell with significant enhancements of each of the aforementioned properties. A first-in-class Cu-based switching device is demonstrated, with a dedicated stack that enabled us to systematically trigger RFG, thus tuning the device’s properties. Along with nanosecond switching speeds, we achieved an endurance of up to 106 cycles with a 102 read window, with outstanding disturb immunity and optimal stability of the filament over time. Furthermore, by tuning the filament’s shape, an excellent control of multi-level bit operations was achieved. Thus, this device offers high flexibility in memory applications.