B. Tillack

This paper describes the architecture of the BiCMOS processes highlighting the modular scheme for the integration of the bipolar modules into a common CMOS platform. HBT design issues associated with the implanted collector wells and the key set of electrical HBT parameters are presented as well

We have determined the process capability of Low Pressure (Rapid Thermal) Chemical Vapor Deposition (LP(RT)CVD) of epitaxial Si/SiGe/Si stacks for heterojunction bipolar transistors (HIBTs). The transistor parameters primarily influenced by the epitaxial characteristics were measured for 600 identically processed 4” wafers. The results demonstrate that it is possible to control accurately the epitaxial process for a 25 nm thick graded SiGe base profile with 20 % Ge and very narrow B doping (5 nm). The pipe limited device yield of about 90 % for an emitter area of 10⁴μm²indicates a very low defect density in the epitaxial layer stack. The process capability indices determined from about 40,000 data points demonstrate the stability and capability of the LP(RT)CVD epitaxy with regard to manufacturing requirements.

Strain compensation in SiGe by heavy boron doping was demonstrated. For this purpose, SiGe layers containing up to several percent of boron were deposited using rapid thermal chemical vapor deposition. The strain compensation effect was evaluated by double crystal x‐ray diffraction measuring the difference between the diffraction peak distances of the boron doped samples and a reference sample without boron which can be directly related to the decrease of the lattice constant in Si_1−x−yGe_xB_y due to the incorporation of boron. The films were characterized by cross‐sectional transmission electron microscopy (XTEM), Auger electron spectroscopy (AES), and secondary ion mass spectroscopy (SIMS).