Mun-Yang Park

A fully differential dual input CMOS transconductor, with high linearity and low distortion, is proposed. To achieve high performance characteristics at low supply voltage, three design considerations are described from the viewpoint of DC-offsets, linear range, and distortions. A 1.8 V 10 MHz fully-differential 3/sup rd/-order Chebyshev Gm-C low pass filter, using this transconductor, is designed and fabricated using a 0.18 /spl mu/m CMOS process. Measured results in a nominal condition (Vc=1.05 V) show 11.3 MHz of bandwidth, 43.7 dBr of stop-band attenuation at 40 MHz, 0.38 dB of pass-band ripple, and 74.4 dB of dynamic range. In addition, the IIP3 obtained at the optimum resistance of the resistor utilized as a distortion canceller is 16.3 dBm. The filter consumes 2.34 mA at 1.8 V power supply.

A merged LNA and sub-harmonic mixer is proposed for a 2GHz WCDMA DCR application. It adopts differential variable gain LNA to increase system dynamic range and 2/sup nd/ order linearity. To remove DC offset, which can be introduced by self-mixing problem, the proposed architecture uses sub-harmonic mixing technique. To increase RF to LO isolation, we use 0.18/spl mu/m triple-well CMOS process. The system shows 28dB and 14dB conversion gain at high gain mode and low gain mode respectively. In each case, the IIP2s are 4.5dBm and 12dBm, and IIP3s are -5dBm and 3.6dBm. The overall power consumption is less than 18mW. The supply voltage is 1.8V and over-all chip size is 2.3mm/spl times/1.2mm.