Linpeng Huang
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Research Subjects
Linpeng Huang has a total of 158 co-authors. Here are the top co-authors by number of shared publications:
- Shengan Zheng
Shanghai Jiao Tong University, Shanghai, China
24 shared publications - Hong Mei
Shanghai Jiao Tong University, Shanghai, China
8 shared publications - Bowen Zhang
Shanghai Jiao Tong University, Shanghai, China
7 shared publications - Weihan Kong
School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University, Shanghai, China
7 shared publications - Zhenlin Qi
Shanghai Jiao Tong University, Shanghai, China
7 shared publications - Yanyan Shen
Shanghai Jiao Tong University
6 shared publications
Latest Publications
- Open Access
- 14 November 2026
- Published by Association for Computing Machinery (ACM)
- p. 1075-1083
Plurio: Scaling Microkernel-based Operating System via Service Localization and Memory Pooling
- 14 November 2026
- Published by Association for Computing Machinery (ACM)
- p. 1075-1083
Open AccessPlurio: Scaling Microkernel-based Operating System via Service Localization and Memory Pooling
- 1 November 2026
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. 75 (11) , 3997-4009
High-Performance and Cache-Efficiency Adaptive Radix Tree for Disaggregated Memory
- 1 November 2026
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. 75 (11) , 3997-4009
High-Performance and Cache-Efficiency Adaptive Radix Tree for Disaggregated Memory
- Open Access
- 1 October 2026
- Published by Association for Computing Machinery (ACM) in Proceedings of the ACM on Software Engineering
- Vol. 3 (ISSTA) , 77-101
XSearch: Explainable Code Search via Concept-to-Code Alignment
With the emergence of deep learning, semantic code search has been widely adopted in both academia and industry. These approaches embed natural-language queries and code snippets into a shared embedding space and retrieve results based on vector similarity. Despite their strong performance on benchmark datasets, they often suffer from poor explainability and generalization. Retrieved code may appear semantically similar yet miss critical functional requirements of the query, while providing no explanation of why the result was retrieved. Moreover, such failures become more severe under distribution shift, where models struggle to generalize to unseen benchmarks. In this work, we propose XSearch, an intrinsically explainable code search framework. Our key insight is that, by relying on global embedding similarity, all existing retrievers inherently take an inductive view. They learn statistical patterns, rather than truly understand the query's functional requirements. Therefore, we address the problem by reformulating code search as a deductive concept alignment problem. At a high level, XSearch (i) identifies functional concepts in the query and (ii) explicitly aligns them with corresponding code statements. This explain-then-predict design not only produces inherent concept-level explanations, but also mitigates shortcut learning that harms out-of-distribution generalization. We train an encoder with explicit concept-alignment objectives and perform retrieval through explicit matching between query concepts and code statements. Experiments show that, when trained on CodeSearchNet with a small model size (GraphCodeBERT with 125M parameters), XSearch improves performance on out-of-distribution benchmarks from 0.02 to 0.33 (15×) over eight state-of-the-art retrievers, and consistently outperforms both encoder-based and decoder-based baselines with up to 7B parameters. A controlled user study further demonstrates that concept-alignment explanations enable users to accept or reject retrieved results both faster and more accurately. The source code is publicly available at https://github.com/code-philia/Xsearch.
- 1 October 2026
- Published by Association for Computing Machinery (ACM) in Proceedings of the ACM on Software Engineering
- Vol. 3 (ISSTA) , 77-101
Open AccessXSearch: Explainable Code Search via Concept-to-Code Alignment
With the emergence of deep learning, semantic code search has been widely adopted in both academia and industry. These approaches embed natural-language queries and code snippets into a shared embedding space and retrieve results based on vector similarity. Despite their strong performance on benchmark datasets, they often suffer from poor explainability and generalization. Retrieved code may appear semantically similar yet miss critical functional requirements of the query, while providing no explanation of why the result was retrieved. Moreover, such failures become more severe under distribution shift, where models struggle to generalize to unseen benchmarks. In this work, we propose XSearch, an intrinsically explainable code search framework. Our key insight is that, by relying on global embedding similarity, all existing retrievers inherently take an inductive view. They learn statistical patterns, rather than truly understand the query's functional requirements. Therefore, we address the problem by reformulating code search as a deductive concept alignment problem. At a high level, XSearch (i) identifies functional concepts in the query and (ii) explicitly aligns them with corresponding code statements. This explain-then-predict design not only produces inherent concept-level explanations, but also mitigates shortcut learning that harms out-of-distribution generalization. We train an encoder with explicit concept-alignment objectives and perform retrieval through explicit matching between query concepts and code statements. Experiments show that, when trained on CodeSearchNet with a small model size (GraphCodeBERT with 125M parameters), XSearch improves performance on out-of-distribution benchmarks from 0.02 to 0.33 (15×) over eight state-of-the-art retrievers, and consistently outperforms both encoder-based and decoder-based baselines with up to 7B parameters. A controlled user study further demonstrates that concept-alignment explanations enable users to accept or reject retrieved results both faster and more accurately. The source code is publicly available at https://github.com/code-philia/Xsearch.
- Open Access
- 1 October 2026
- Published by Association for Computing Machinery (ACM) in Proceedings of the ACM on Software Engineering
- Vol. 3 (ISSTA) , 4564-4585
IssueExec: A Test-Driven Approach for Localizing Software Engineering Issues
Issue localization, which identifies code locations requiring modification from issue descriptions, is a critical step in automated software maintenance. Existing approaches predominantly attempt to directly align issue descriptions with code elements, yet often struggle due to the inherent abstraction gap between the issue description and code implementation. Seeking alternative signals, our theoretical analysis suggests that test suites can serve as executable proxies for requirements, reducing localization uncertainty by 7.73 bits of entropy on average. A large-scale empirical study on 18 repositories validates this premise: existing tests cover 96.98% of ground-truth files, and the two-hop pathway yields stronger semantic connectivity than direct matching in 82.4% of cases. Despite their potential, leveraging tests for localization faces two key challenges: the semantic gap separating issue descriptions from test identifiers, and the substantial noise in execution traces from infrastructure code. To address these, we propose IssueExec, which bridges the semantic gap through domain-knowledge-enhanced test representations and filters noise via hierarchical trace analysis. Experiments on SWE-bench Lite show that IssueExec achieves state-of-the-art performance, improving function-level Recall@1 by 41.57% over the strongest baseline. When integrated into the Agentless pipeline, IssueExec resolves 17.72% more issues, demonstrating practical downstream benefits.
- 1 October 2026
- Published by Association for Computing Machinery (ACM) in Proceedings of the ACM on Software Engineering
- Vol. 3 (ISSTA) , 4564-4585
Open AccessIssueExec: A Test-Driven Approach for Localizing Software Engineering Issues
Issue localization, which identifies code locations requiring modification from issue descriptions, is a critical step in automated software maintenance. Existing approaches predominantly attempt to directly align issue descriptions with code elements, yet often struggle due to the inherent abstraction gap between the issue description and code implementation. Seeking alternative signals, our theoretical analysis suggests that test suites can serve as executable proxies for requirements, reducing localization uncertainty by 7.73 bits of entropy on average. A large-scale empirical study on 18 repositories validates this premise: existing tests cover 96.98% of ground-truth files, and the two-hop pathway yields stronger semantic connectivity than direct matching in 82.4% of cases. Despite their potential, leveraging tests for localization faces two key challenges: the semantic gap separating issue descriptions from test identifiers, and the substantial noise in execution traces from infrastructure code. To address these, we propose IssueExec, which bridges the semantic gap through domain-knowledge-enhanced test representations and filters noise via hierarchical trace analysis. Experiments on SWE-bench Lite show that IssueExec achieves state-of-the-art performance, improving function-level Recall@1 by 41.57% over the strongest baseline. When integrated into the Agentless pipeline, IssueExec resolves 17.72% more issues, demonstrating practical downstream benefits.
- Open Access
- 2 September 2026
- Published by Association for Computing Machinery (ACM)
- p. 97-111
Mario: Hierarchically Pipelined Approximate Nearest Neighbor Search on Computational Storage Devices
Scaling Approximate Nearest Neighbor Search (ANNS) to massive datasets exposes fundamental bottlenecks in PCIe bandwidth and random I/O. Computational storage devices (CSDs) promise to mitigate these constraints by enabling near-storage computation, but existing CSD-based ANNS engines employ only coarse-grained producer-consumer pipelines and underutilize heterogeneous on-device computational resources. We present Mario, a hierarchically pipelined ANNS framework for CSDs that couples a centroid-shard data organization with fine-grained coordination between the flash translation layer (FTL) and an on-board Field-Programmable Gate Array (FPGA). Mario introduces a speculative inter-shard pipeline that overlaps centroid-graph traversal, shard prefetching, and result aggregation with FPGA processing, and a stall-free intra-shard pipeline that streams vectors through parallel distance units and a streaming top-k updater. We prototype Mario on a Daisy+ OpenSSD platform and evaluate it on 100M-scale datasets, where it achieves 3.49× higher performance than existing ANNS architectures in average QPS, while maintaining a Recall@10 above 90%.
- 2 September 2026
- Published by Association for Computing Machinery (ACM)
- p. 97-111
Open AccessMario: Hierarchically Pipelined Approximate Nearest Neighbor Search on Computational Storage Devices
Scaling Approximate Nearest Neighbor Search (ANNS) to massive datasets exposes fundamental bottlenecks in PCIe bandwidth and random I/O. Computational storage devices (CSDs) promise to mitigate these constraints by enabling near-storage computation, but existing CSD-based ANNS engines employ only coarse-grained producer-consumer pipelines and underutilize heterogeneous on-device computational resources. We present Mario, a hierarchically pipelined ANNS framework for CSDs that couples a centroid-shard data organization with fine-grained coordination between the flash translation layer (FTL) and an on-board Field-Programmable Gate Array (FPGA). Mario introduces a speculative inter-shard pipeline that overlaps centroid-graph traversal, shard prefetching, and result aggregation with FPGA processing, and a stall-free intra-shard pipeline that streams vectors through parallel distance units and a streaming top-k updater. We prototype Mario on a Daisy+ OpenSSD platform and evaluate it on 100M-scale datasets, where it achieves 3.49× higher performance than existing ANNS architectures in average QPS, while maintaining a Recall@10 above 90%.
- Open Access
- 26 July 2026
- Published by Association for Computing Machinery (ACM)
- p. 1-7
Prism: Reducing Arithmetic for High-Recall Approximate Nearest Neighbor Search on Processing-in-Memory
- 26 July 2026
- Published by Association for Computing Machinery (ACM)
- p. 1-7
Open AccessPrism: Reducing Arithmetic for High-Recall Approximate Nearest Neighbor Search on Processing-in-Memory
- Open Access
- 26 July 2026
- Published by Association for Computing Machinery (ACM)
- p. 1-7
Marlin: I/O-Efficient Prefix KV Cache Retrieval for Long-Prefix LLM Serving
- 26 July 2026
- Published by Association for Computing Machinery (ACM)
- p. 1-7
Open AccessMarlin: I/O-Efficient Prefix KV Cache Retrieval for Long-Prefix LLM Serving
- Open Access
- 25 June 2026
- Published by Association for Computing Machinery (ACM) in ACM Transactions on Architecture and Code Optimization
- Vol. 23 (2) , 1-26
SwitchFS: Exploiting Persistent Memory Bandwidth in Cluster via Learning-based I/O Path Selection
Persistent Memory (PM) and Remote Direct Memory Access (RDMA) technologies have significantly improved the storage and network performance in data centers and spawned a slew of distributed file systems (DFS) designs. Existing DFSs often consider remote storage a performance constraint, assuming it delivers lower bandwidth and higher latency than local devices. However, the advancements in RDMA technology present an opportunity to narrow the performance disparity between local and remote access, empowering DFSs to harness both local and remote I/O capabilities, thereby attaining higher aggregated throughput. We propose SwitchFS, a new DFS architecture that exploits all the available PM bandwidth in a cluster with generative I/O path assignment policy. It dynamically steers client-side I/O requests to the local cache and the remote devices accessible through RDMA network. To determine the run-time I/O path adaptively, we introduce MELON, an I/O path selection policy based on a reinforcement learning model, designed to optimize expected I/O latency. Meanwhile, SwitchFS adopts a model-driven opportunistic replication mechanism at the server-side, which further improves I/O bandwidth utilization of remote devices across the cluster. Furthermore, we adopt the fine-grained concurrency control approach to improve scalability. Across synthetic and real-world application workloads, SwitchFS improves throughput by up to 5.9× over existing DFS designs while preserving low tail latency and incurring modest learning overhead.
- 25 June 2026
- Published by Association for Computing Machinery (ACM) in ACM Transactions on Architecture and Code Optimization
- Vol. 23 (2) , 1-26
Open AccessSwitchFS: Exploiting Persistent Memory Bandwidth in Cluster via Learning-based I/O Path Selection
Persistent Memory (PM) and Remote Direct Memory Access (RDMA) technologies have significantly improved the storage and network performance in data centers and spawned a slew of distributed file systems (DFS) designs. Existing DFSs often consider remote storage a performance constraint, assuming it delivers lower bandwidth and higher latency than local devices. However, the advancements in RDMA technology present an opportunity to narrow the performance disparity between local and remote access, empowering DFSs to harness both local and remote I/O capabilities, thereby attaining higher aggregated throughput. We propose SwitchFS, a new DFS architecture that exploits all the available PM bandwidth in a cluster with generative I/O path assignment policy. It dynamically steers client-side I/O requests to the local cache and the remote devices accessible through RDMA network. To determine the run-time I/O path adaptively, we introduce MELON, an I/O path selection policy based on a reinforcement learning model, designed to optimize expected I/O latency. Meanwhile, SwitchFS adopts a model-driven opportunistic replication mechanism at the server-side, which further improves I/O bandwidth utilization of remote devices across the cluster. Furthermore, we adopt the fine-grained concurrency control approach to improve scalability. Across synthetic and real-world application workloads, SwitchFS improves throughput by up to 5.9× over existing DFS designs while preserving low tail latency and incurring modest learning overhead.
- Open Access
- 2 April 2026
- Published by Association for Computing Machinery (ACM) in Proceedings of the ACM on Management of Data
- Vol. 4 (1) , 1-25
DART: A Lock-free Two-layer Hashed ART Index for Disaggregated Memory
Disaggregated memory architecture decouples computing and memory resources into separate pools connected via high-speed interconnect technologies, offering substantial advantages in scalability and resource utilization. However, this architecture also poses unique challenges in designing effective index structures and concurrency protocols due to increased remote memory access overhead and its shared-everything nature. In this paper, we present DART, a lock-free two-layer hashed Adaptive Radix Tree (ART) designed to minimize remote memory access while ensuring high concurrency and crash consistency in the disaggregated memory architecture. DART incorporates a hash-based Express Skip Table at its upper layer, which reduces the round trips of remote memory access during index traversal. In the base layer, DART employs an Adaptive Hashed Layout within ART nodes, confining remote memory accesses during in-node searches to small hash buckets. By further leveraging Decoupled Metadata Organization, DART achieves lock-free atomic updates, enabling high scalability and ensuring crash consistency. Our evaluation demonstrates that DART outperforms state-of-the-art counterparts by up to 5.8× in YCSB workloads.
- 2 April 2026
- Published by Association for Computing Machinery (ACM) in Proceedings of the ACM on Management of Data
- Vol. 4 (1) , 1-25
Open AccessDART: A Lock-free Two-layer Hashed ART Index for Disaggregated Memory
Disaggregated memory architecture decouples computing and memory resources into separate pools connected via high-speed interconnect technologies, offering substantial advantages in scalability and resource utilization. However, this architecture also poses unique challenges in designing effective index structures and concurrency protocols due to increased remote memory access overhead and its shared-everything nature. In this paper, we present DART, a lock-free two-layer hashed Adaptive Radix Tree (ART) designed to minimize remote memory access while ensuring high concurrency and crash consistency in the disaggregated memory architecture. DART incorporates a hash-based Express Skip Table at its upper layer, which reduces the round trips of remote memory access during index traversal. In the base layer, DART employs an Adaptive Hashed Layout within ART nodes, confining remote memory accesses during in-node searches to small hash buckets. By further leveraging Decoupled Metadata Organization, DART achieves lock-free atomic updates, enabling high scalability and ensuring crash consistency. Our evaluation demonstrates that DART outperforms state-of-the-art counterparts by up to 5.8× in YCSB workloads.
- Open Access
- 13 December 2025
- Published by Association for Computing Machinery (ACM) in ACM Transactions on Architecture and Code Optimization
- Vol. 22 (4) , 1-22
Accelerating Verifiable Queries over Blockchain Database System Using Processing-in-memory
Blockchain database systems, such as Ethereum and vChain, suffer from limited memory bandwidth and high memory access latency when retrieving user-requested data. Emerging processing-in-memory (PIM) technologies are promising to accelerate users’ queries, by enabling low-latency memory access and aggregated memory bandwidth scaling with the number of PIM modules. In this article, we present Panther, the first PIM-based blockchain database system supporting efficient verifiable queries. Blocks are distributed to PIM modules for high parallelism with low inter-PIM communication cost, managed by a regression-based model. For load balance across PIM modules, data are adaptively promoted and demoted between the host and PIM sides. In multiple datasets, Panther achieves up to 23.6× speedup for verifiable queries and reduces metadata storage by orders of magnitude compared to state-of-the-art designs on real PIM hardware.
- 13 December 2025
- Published by Association for Computing Machinery (ACM) in ACM Transactions on Architecture and Code Optimization
- Vol. 22 (4) , 1-22
Open AccessAccelerating Verifiable Queries over Blockchain Database System Using Processing-in-memory
Blockchain database systems, such as Ethereum and vChain, suffer from limited memory bandwidth and high memory access latency when retrieving user-requested data. Emerging processing-in-memory (PIM) technologies are promising to accelerate users’ queries, by enabling low-latency memory access and aggregated memory bandwidth scaling with the number of PIM modules. In this article, we present Panther, the first PIM-based blockchain database system supporting efficient verifiable queries. Blocks are distributed to PIM modules for high parallelism with low inter-PIM communication cost, managed by a regression-based model. For load balance across PIM modules, data are adaptively promoted and demoted between the host and PIM sides. In multiple datasets, Panther achieves up to 23.6× speedup for verifiable queries and reduces metadata storage by orders of magnitude compared to state-of-the-art designs on real PIM hardware.