Qiao Li
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Previous Organizations / Institutes
The organizations / institutes from the scholar's other articles in the past ten years
Research Subjects
Qiao Li has a total of 191 co-authors. Here are the top co-authors by number of shared publications:
- Chun Jason Xue
Mohamed bin Zayed University of Artificial Intelligence
22 shared publications Chun Jason Xue
20 shared publicationsLiang Shi
East China Normal University
17 shared publications- Jie Zhang
Peking University
11 shared publications Congming Gao
9 shared publications- Yufei Cui
McGill University, Montreal, Canada
8 shared publications
Latest Publications
- Open Access
- 26 July 2026
- Published by Association for Computing Machinery (ACM)
- p. 1-7
WILL: Write Invalidation Skipping for QLC NAND by Leveraging Data Lifespan and Latency Awareness
- 26 July 2026
- Published by Association for Computing Machinery (ACM)
- p. 1-7
Open AccessWILL: Write Invalidation Skipping for QLC NAND by Leveraging Data Lifespan and Latency Awareness
- Open Access
- 26 July 2026
- Published by Association for Computing Machinery (ACM)
- p. 1-7
On-Demand Multi-Task Sparsity for Efficient Large-Model Deployment on Edge Devices
- 26 July 2026
- Published by Association for Computing Machinery (ACM)
- p. 1-7
Open AccessOn-Demand Multi-Task Sparsity for Efficient Large-Model Deployment on Edge Devices
- Open Access
- 28 May 2026
- Published by Association for Computing Machinery (ACM) in ACM Transactions on Architecture and Code Optimization
- Vol. 23  (3) , 1-25
Collaborative Data Completing for Robust SSD Failure Prediction
Solid-state drives (SSDs) are integral to modern data centers due to their superior performance and efficiency. However, ensuring their reliability under large-scale deployment remains challenging, with failures exhibiting widespread and diverse patterns across drive models and failure types. Factors such as mislabeling, missing data, and class imbalance significantly hinder accurate predictions and can obscure failure-relevant signals. While advanced machine learning models, such as GANs and CNN-LSTM architectures, have shown promise, they often struggle to address these data quality issues effectively. We propose an integrated data preprocessing framework for SSD failure prediction that combines feature screening, fault-aware imputation, and model-wise class balancing. The framework is designed to address heterogeneous failure types, structured missingness, and severe class imbalance under a leakage-free evaluation protocol. The integrated effect of the three preprocessing steps achieves significant improvement on the prediction performance. Testing on a dataset of 700,000 NVMe SSDs from Alibaba, our approach improves recall from 51% to 73% and precision from 59% to 88% under a leakage-free train and test split, outperforming representative state-of-the-art pipelines. These results demonstrate the effectiveness of tailoring preprocessing methods to the unique challenges of SSD failure prediction, enhancing reliability in real-world operations.
- 28 May 2026
- Published by Association for Computing Machinery (ACM) in ACM Transactions on Architecture and Code Optimization
- Vol. 23  (3) , 1-25
Open AccessCollaborative Data Completing for Robust SSD Failure Prediction
Solid-state drives (SSDs) are integral to modern data centers due to their superior performance and efficiency. However, ensuring their reliability under large-scale deployment remains challenging, with failures exhibiting widespread and diverse patterns across drive models and failure types. Factors such as mislabeling, missing data, and class imbalance significantly hinder accurate predictions and can obscure failure-relevant signals. While advanced machine learning models, such as GANs and CNN-LSTM architectures, have shown promise, they often struggle to address these data quality issues effectively. We propose an integrated data preprocessing framework for SSD failure prediction that combines feature screening, fault-aware imputation, and model-wise class balancing. The framework is designed to address heterogeneous failure types, structured missingness, and severe class imbalance under a leakage-free evaluation protocol. The integrated effect of the three preprocessing steps achieves significant improvement on the prediction performance. Testing on a dataset of 700,000 NVMe SSDs from Alibaba, our approach improves recall from 51% to 73% and precision from 59% to 88% under a leakage-free train and test split, outperforming representative state-of-the-art pipelines. These results demonstrate the effectiveness of tailoring preprocessing methods to the unique challenges of SSD failure prediction, enhancing reliability in real-world operations.
- Open Access
- 27 April 2026
- Published by Association for Computing Machinery (ACM)
- p. 370-376
C law M obile : Rethinking Smartphone-Native Agentic Systems
- 27 April 2026
- Published by Association for Computing Machinery (ACM)
- p. 370-376
Open AccessC law M obile : Rethinking Smartphone-Native Agentic Systems
- Open Access
- 26 April 2026
- Published by Association for Computing Machinery (ACM)
- p. 2276-2291
ColdCode: Cold Data Encoding for Enhanced Reliability and Lifetime in 3D NAND Flash
- 26 April 2026
- Published by Association for Computing Machinery (ACM)
- p. 2276-2291
Open AccessColdCode: Cold Data Encoding for Enhanced Reliability and Lifetime in 3D NAND Flash
- Open Access
- 22 March 2026
- Published by Association for Computing Machinery (ACM) in ACM Transactions on Architecture and Code Optimization
- Vol. 23  (1) , 1-24
High Performance Singular Value Decomposition on GPU Architectures
With the advancement of GPU architecture, matrix computation engines such as NVIDIA Tensor Cores now support double-precision (FP64) General matrix multiplications (GEMMs) with the same efficiency as single-precision (FP32) GEMMs. However, the adoption of this enhanced FP64 capability remains limited, primarily restricted to applications that involve multiple FP64 BLAS3 operations. Singular Value Decomposition (SVD), a fundamental decomposition in numerical linear algebra with numerous applications, can greatly benefit from exploiting this hardware feature. In this article, for FP32 SVD, we propose a novel algorithm, FP64 precision eigenvalue decomposition (EVD) based SVD, specifically designed to leverage the latest GPU architectural features. We provide a theoretical analysis demonstrating the feasibility of our approach on emerging GPU architectures and evaluate it from both accuracy and performance perspectives. Moreover, for FP64 SVD, we introduce a double-blocking band reduction technique combined with a GPU-based bulge chasing algorithm to further accelerate the overall SVD process. Experimental results show that, for FP32 SVD, our EVD-based SVD implementation achieves higher numerical accuracy and delivers speedups of up to 6.1× on H100 and 5.0× on A100 over the state-of-the-art cuSOLVER SVD solver. In the case of FP64 SVD, our method also achieves 4.9× and 4.8× speedups on H100 and A100, respectively. These results highlight the potential of our approach as a highly efficient and accurate solution for SVD on modern GPU platforms.
- 22 March 2026
- Published by Association for Computing Machinery (ACM) in ACM Transactions on Architecture and Code Optimization
- Vol. 23  (1) , 1-24
Open AccessHigh Performance Singular Value Decomposition on GPU Architectures
With the advancement of GPU architecture, matrix computation engines such as NVIDIA Tensor Cores now support double-precision (FP64) General matrix multiplications (GEMMs) with the same efficiency as single-precision (FP32) GEMMs. However, the adoption of this enhanced FP64 capability remains limited, primarily restricted to applications that involve multiple FP64 BLAS3 operations. Singular Value Decomposition (SVD), a fundamental decomposition in numerical linear algebra with numerous applications, can greatly benefit from exploiting this hardware feature. In this article, for FP32 SVD, we propose a novel algorithm, FP64 precision eigenvalue decomposition (EVD) based SVD, specifically designed to leverage the latest GPU architectural features. We provide a theoretical analysis demonstrating the feasibility of our approach on emerging GPU architectures and evaluate it from both accuracy and performance perspectives. Moreover, for FP64 SVD, we introduce a double-blocking band reduction technique combined with a GPU-based bulge chasing algorithm to further accelerate the overall SVD process. Experimental results show that, for FP32 SVD, our EVD-based SVD implementation achieves higher numerical accuracy and delivers speedups of up to 6.1× on H100 and 5.0× on A100 over the state-of-the-art cuSOLVER SVD solver. In the case of FP64 SVD, our method also achieves 4.9× and 4.8× speedups on H100 and A100, respectively. These results highlight the potential of our approach as a highly efficient and accurate solution for SVD on modern GPU platforms.
- Open Access
On-Demand Multi-Task Sparsity for Efficient Large-Model Deployment on Edge Devices
Sparsity is essential for deploying large models on resource constrained edge platforms. However, optimizing sparsity patterns for individual tasks in isolation ignores the significant I/O overhead incurred during frequent task switching. We introduce an on-demand multi-task sparsity framework specifically designed to minimize switching costs by maximizing parameter reuse. Unlike monolithic approaches, we decompose weights into reusable block-granular units and align sparse structures across tasks to maximize overlap. By dynamically loading only the small differential set of blocks required for the next task, our method effectively mitigates the cold-start latency inherent in traditional monolithic approaches.Experiments on a real-world autonomous driving platform demonstrate that our framework achieves superior switching efficiency, accelerating task switching by over 6.6X on average compared to existing sparsity methods.
Open AccessOn-Demand Multi-Task Sparsity for Efficient Large-Model Deployment on Edge Devices
Sparsity is essential for deploying large models on resource constrained edge platforms. However, optimizing sparsity patterns for individual tasks in isolation ignores the significant I/O overhead incurred during frequent task switching. We introduce an on-demand multi-task sparsity framework specifically designed to minimize switching costs by maximizing parameter reuse. Unlike monolithic approaches, we decompose weights into reusable block-granular units and align sparse structures across tasks to maximize overlap. By dynamically loading only the small differential set of blocks required for the next task, our method effectively mitigates the cold-start latency inherent in traditional monolithic approaches.Experiments on a real-world autonomous driving platform demonstrate that our framework achieves superior switching efficiency, accelerating task switching by over 6.6X on average compared to existing sparsity methods.
- Open Access
Pipelined Dense Symmetric Eigenvalue Decomposition on Multi-GPU Architectures
Large symmetric eigenvalue problems are commonly observed in many disciplines such as Chemistry and Physics, and several libraries including cuSOLVERMp, MAGMA and ELPA support computing large eigenvalue decomposition on multi-GPU or multi-CPU-GPU hybrid architectures. However, these libraries do not provide satisfied performance that all of the libraries only utilize around 1.5\% of the peak multi-GPU performance. In this paper, we propose a pipelined two-stage eigenvalue decomposition algorithm instead of conventional subsequent algorithm with substantial optimizations. On an 8$\times$A100 platform, our implementation surpasses state-of-the-art cuSOLVERMp and MAGMA baselines, delivering mean speedups of 5.74$\times$ and 6.59$\times$, with better strong and weak scalability.
Open AccessPipelined Dense Symmetric Eigenvalue Decomposition on Multi-GPU Architectures
Large symmetric eigenvalue problems are commonly observed in many disciplines such as Chemistry and Physics, and several libraries including cuSOLVERMp, MAGMA and ELPA support computing large eigenvalue decomposition on multi-GPU or multi-CPU-GPU hybrid architectures. However, these libraries do not provide satisfied performance that all of the libraries only utilize around 1.5\% of the peak multi-GPU performance. In this paper, we propose a pipelined two-stage eigenvalue decomposition algorithm instead of conventional subsequent algorithm with substantial optimizations. On an 8$\times$A100 platform, our implementation surpasses state-of-the-art cuSOLVERMp and MAGMA baselines, delivering mean speedups of 5.74$\times$ and 6.59$\times$, with better strong and weak scalability.
- Open Access
- 8 September 2025
- Published by Association for Computing Machinery (ACM)
- p. 374-384
HMGraph: Boosting GNN Training on Hierarchical Memory via Coordinated Cache
- 8 September 2025
- Published by Association for Computing Machinery (ACM)
- p. 374-384
Open AccessHMGraph: Boosting GNN Training on Hierarchical Memory via Coordinated Cache