P. Vigneshwara Raja

The performance-limiting electron and hole trapping centers in 4H-SiC PiN power diodes are determined by combined deep-level transient Fourier spectroscopy (DLTFS) experiments and technology computer-aided design (TCAD) simulations. Two electron traps E1 (EC − 0.19 eV) and E2 (EC − 0.67 eV) and three hole traps H1 (EV + 0.16 eV), H2 (EV + 0.3 eV), and H3 (EV + 0.63 eV) are detected by DLTFS. Since DLTFS measurements were limited to 400 K, a few deep-level defects could not be detected in our experiments. In addition to the traps identified by DLTFS, two deep levels commonly reported at elevated temperatures, E3 (EC – 1.65 eV) and H4 (EV + 1.43 eV), are integrated into the TCAD model to perform a reliable trapping analysis. The effects of electron traps, hole traps, and individual traps are evaluated by selectively excluding them from the simulation. Hole trapping is found to be more prominent than electron trapping in pristine (as-fabricated/untouched) diodes. Among the traps, shallow hole trap H1 exhibits a strong impact in reducing the conduction current (followed by E3) in pristine diodes. To explore the fundamental nature of each trap, the concentration (NT) of an individual trap is increased to a higher value without changing the NT of other defects. Subsequently, the diode characteristics are analyzed at higher NT of the specific trap. The traps E2 and E3 significantly reduce the diode current at higher NT. The deep acceptor E2 is primarily responsible for the donor doping compensation in the n− drift layer.

This work investigates the incomplete ionization effects of aluminum (Al) acceptor dopants on the static and dynamic performance of 4H‐SiC PiN power diodes, using calibrated TCAD simulations. The N dopants form shallow donor energy at E _C − 0.065 eV and are nearly completely ionized at room temperature, while the Al acceptor introduces a deeper level at E _V + 0.19 eV, resulting in only partial ionization. The reduced acceptor activation decreases the minority carrier injection, thereby undermining conductivity modulation. Hence, 18.4% reduction in forward current at 5 V is observed under the incomplete ionization case, relative to the complete ionization conditions. Conversely, reverse recovery performance improves due to the reduced charge storage under incomplete ionization, leading to 34.2%, 18.9%, and 29.6% reductions in reverse recovery charge ( Q _rr ), current ( I _prr ), and time ( T _rr ), respectively. The reverse I _R – V _R and C–V characteristics remain unaffected by the incomplete ionization. The Al acceptor energy at E _V + 0.02 eV, which yields 99% ionization, is also anticipated at room temperature. Furthermore, the temperature‐dependent ionization behavior of Al acceptors and their influences on the electrical properties are evaluated. Therefore, incomplete Al ionization‐induced deviations in the 4H‐SiC PiN diode properties are comprehensively reported.

The trapping-induced performance degradations in n-type gallium oxide (Ga₂O₃) Schottky barrier diodes (SBDs) are studied by validated TCAD simulations. Five as-grown defects in Ga₂O₃ at E_C – 0.6 eV (T1), E_C – 0.75 eV (T2), E_C – 1.05 eV (T3), E_C – 2.3 eV (T4), and E_C – 4.4 eV (T5) are included in the drift layer. The TCAD model is validated by matching the forward J_F-V_F, reverse J_R-V_R, and C-V characteristics with the experimental data. Specifically, non-local tunneling (NLT) at Schottky junction and trap-assisted tunneling (TAT) at T1 are modeled to simulate J_R-V_R. Since the as-grown trap concentration (N_T) in Ga₂O₃ is reported up to 5×10¹⁶ cm^-3, trapping-induced changes in Ga₂O₃ SBD characteristics are investigated in the N_T range of 10¹⁴ cm^-3 to 1016 cm-3. To identify the performance-limiting traps, N_T of the specific trap is increased without changing the N_T of the other traps, and the electrical characteristics are compared at that N_T value for each trap. The simulation results show that the traps T1, T2, and T3 play an equivalent role in reducing the free electron density of the forward-biased SBD. The trap T1 primarily contributes to the TAT reverse current. While the traps at T2 and T3 are mainly responsible for the drift layer compensation, as noted from the C-V profile. Hence, the traps T1, T2, and T3 are identified as performance-limiting traps in the n-type Ga₂O₃ SBD.

This work develops a TCAD-based neutron radiation damage model for 4H-silicon carbide (4H-SiC) Schottky barrier diode (SBD) alpha-particle detectors, through extensive experimental validation. At first, unirradiated forward J-V properties are matched, followed by reverse J-V simulation using the trap-assisted tunneling (TAT) model. Especially, a modified Heavy-Ion (HI) model is employed to validate charge collection efficiency (CCE) over the entire detector bias range. The neutron irradiation-induced changes in detector properties are modeled according to the expression N_T = η×k×Փ_1MeV, where N_T is the trap concentration, η is the introduction rate, k is the hardness factor, and Փ_1MeV is the 1 MeV neutron fluence. For an initial guess, η is calculated at Փ_1MeV = 2 × 10¹³ n_eq/cm² with the help of reported trap parameters. Eventually, the η value is optimized to match the J-V properties at Փ_1MeV = 2 × 10¹⁴ neq/cm². The same η is utilized to validate the forward and reverse J-V and CCE characteristics up to a higher fluence of 5 × 10¹⁵ n_eq/cm². The macroscopic and microscopic variations in the detector properties are assessed as a function of fluence up to 10¹⁶ n_eq/cm². The developed radiation damage model establishes a linear relationship between N_T and Փ_1MeV, thus enabling predictions of 4H-SiC SBD detector performance across fluence levels and radiation hardness.

This work proposes a new method to estimate surface donor density ( N _TD ) in AlGaN/GaN high‐electron‐mobility transistors (HEMTs) using validated drain current transient (DCT) simulations. The DCT signal is actually induced by an acceptor‐type buffer trap at E _C −0.65 eV. Although the DCT signal amplitude (Δ I _DS ) reflects ionized acceptor density ( N _TA ⁻ ) in the buffer, N _TA concentration is not self‐sufficient to predict the actual Δ I _DS variations. The simulation analysis reveals that 2D electron gas (2DEG) density augments with increasing N _TD , resulting in more electron trapping under the gate edge region (towards the drain end) of the buffer. The increased buffer trapping raises the Δ I _DS signal during the emission transient. After multiple simulation runs, N _TD for the donor trap at E _C −0.2 eV is estimated to be 1.3 × 10 ¹³ cm ⁻² , based on the validated DCT properties at different temperatures. The matched output admittance ( Y ₂₂ ) and forward transfer admittance ( Y ₂₁ ) parameters also yield similar N _TD =1.4 × 10 ¹³ cm ⁻² , thus verifying the DCT findings. N _TD is often assumed in simulations, so the extracted N _TD (1.3–1.4 × 10 ¹³ cm ⁻² ) benefits the GaN HEMT community for accurately modeling the surface donor properties.

A systematic calibration procedure is carried out for accurately modeling the state-of-the-art experimental I-V and charge collection efficiency (CCE) of 4-Hexagonal Silicon Carbide (4H-SiC) Schottky barrier diode (SBD) alpha-particle detector in the TCAD simulator. At first, the simulated forward I-V is validated by adjusting the Schottky metal work function, mobility, and saturation velocity. The conventional models, such as barrier lowering (BL) and non-local tunneling (NLT), underestimate the reverse I-V. After several iterations, the reverse I-V is perfectly matched by activating the non-local trap-assisted tunneling (TAT) model with the deep-level acceptor trap Z _1/2 at Ec - 0.73 eV. On the other hand, employing the TAT model with other omnipresent Ti trap at Ec – 0.19 eV overestimates the leakage current, indicating that the proper trap selection is necessary to model the TAT current. The linear energy transfer (LET) data extracted from the SRIM tool is incorporated in the heavy-ion (HI) TCAD model for simulating CCE. The default HI model predominantly predicts only drift-induced charge contributions in the detector and underestimates the diffusion component of CCE at low voltages. Thus, a novel HI TCAD model is considered to match the CCE in the entire voltage range, which includes both drift and diffusion-induced transient currents contributing to the CCE. The temperature-induced variations in the CCE are also reported.

The forward and reverse current transport mechanisms, temperature dependence of Schottky barrier height (SBH) and ideality factor, barrier inhomogeneity analysis, and trap parameters for Schottky barrier diodes (SBDs) fabricated on 4H-SiC, GaN-on-GaN and AlGaN/GaN epitaxial substrates are reported. High SBH is identified for Ni/4H-SiC (1.31 eV) and Ti/4H-SiC (1.18 eV) SBDs with a low leakage current density of −8 A cm⁻² at −200 V. Thermally stimulated capacitance detects the well-known Z_1/2 electron trap at E _C—0.65 eV in both 4H-SiC SBDs, while an additional deep-level trap at E _C—1.13 eV is found only in Ni/4H-SiC SBDs. The vertical Ni/GaN SBD exhibits a promising SBH of 0.83 eV, and two electron traps at E _C—0.18 eV and E _C—0.56 eV are identified from deep-level transient Fourier spectroscopy. A peculiar two-diode model behavior is detected at metal/GaN/AlGaN/GaN interface of high-electron mobility transistor (HEMT); the first diode (SBH-1 of 1.15 eV) exists at the standard Metal/GaN Schottky junction, whereas the second diode (SBH-2 of 0.72 eV) forms due to the energy difference between the AlGaN conduction band and the heterojunction Fermi level. The compensational Fe-doping-related buffer traps at E _C—0.5 eV and E _C—0.6 eV are determined in the AlGaN/GaN HEMT, through the drain current transient spectroscopy experiments.

Carrier emission rate accelerates from a trap with the increase in drain voltage due to the self-heating (SH) and Poole–Frenkel (PF) emission effects; thus, the conventional Arrhenius analysis underestimates the trap activation energy. For this purpose, this work estimates the zero-field (actual) activation energy of a trap in InAlN/GaN and AlN/GaN high-electron mobility transistors (HEMTs) by including SH and PF effects in the emission rate equation. The HEMT thermal resistance ( $\textit{R}_{\text{TH}}$ ) is computed from the technology computer aided design (TCAD) simulation results. Subsequently, the SH-induced increase in the channel temperature ( ${\sf\Delta}\textit{T}$ ) is incorporated in the Arrhenius plot, constructed from drain current transient (DCT) and output-admittance ( $\textit{Y}_{\text{22}}$ ) parameters. The apparent trap activation energy ( $\textit{E}_{\text{ap}}$ ) is calculated from the measured DCT and $\textit{Y}_{\text{22}}$ at different drain voltages, and the respective electric field ( F ) at each bias condition is extracted from the simulation. Finally, zero-field activation energy ( $\textit{E}_{\text{0}}$ ) is estimated from the $\textit{E}_{\text{ap}}$ versus ( F ) $^{\text{0.5}}$ plot intercept. $\textit{E}_{\text{0}}$ for the well-known Fe-related buffer trap is identified at $\textit{E}_{\textit{C}}- \text{0.7}$ eV in the InAlN/GaN HEMT. Similarly, $\textit{E}_{\text{0}}$ at $\textit{E}_{\textit{C}}- \text{0.51}$ eV is found for the trap in the C-doped AlN/GaN HEMT.