Asisa Kumar Panigrahy

Artificial Intelligence (AI) based generative models have advanced rapidly, making it possible to generate highly realistic synthetic media. These technologies build new opportunities for creative and legitimate use in various domains, but they also give rise to significant concerns about digital trust and privacy. Though it has various legitimate uses, it can also be used to generate harmful content, often known as "deepfake". It can cause political misinformation, non-consensual content generation and financial fraud that costs millions. These consequences are harmful for democracy, healthcare and the legal system. One of the growing concerns is the emergence of deepfake in medical imaging, where fabrication and manipulation of diagnostic scans and clinical imagery directly threaten patient safety, healthcare integrity and medical forensics. This paper presents a systematic literature review (SLR) of various deepfake generation and detection methods based on Artificial intelligence. Following the PRISMA framework , relevant studies are identified from major scientific databases, including IEEE Xplore, Scopus, ScienceDirect, SpringerLink, Google scholar and ACM Digital Library. Following a PRISMA-based search and screening process, 142 primary studies were selected from an initial pool of studies, based on predefined inclusion, exclusion, and quality-assessment criteria. Some literature published prior to 2021 is additionally cited for contextual background, separate from the 142 primary studies reviewed. The selected literature is analysed and categorised into different deepfake generation and detection methods. Furthermore, benchmark datasets, evaluation protocols and comparative performance trends are analysed. Key challenges such as dataset bias, poor generalization, adversarial vulnerability and lack of explainability are discussed. Future research directions are outlined. This review aims to serve as a useful reference for researchers and practitioners working on reliable deepfake detection systems.

In this work, an energy-efficient, high-speed 16-nm FinFET-based hybrid wide-bit-length CLA-CS adder is implemented over a wide range of [Formula: see text]-levels. The proposed architecture combines an 8-bit CMOS domino-structure-based MCC adder module with a carry-skip module employing concatenation and incrementation techniques. The carry outputs of the proposed hybrid adder are obtained in parallel by adopting two separate FinFET-based 4-bit even and odd MCC chains. Concatenation and incrementation blocks are additionally used to boost the speed of the innovative wide bit-length hybrid CLA-CS adder. Finally, the new hybrid CLA-CS wide bit-length adder uses AOI (AND-OR-Invert) and OAI (OR-AND-Invert) logic gates for the carry-skip logic circuit instead of multiplexer logic. The 16[Formula: see text]nm FinFET-based adder with 8-, 16-, 32-and 64-bit sizes implemented with [Formula: see text][Formula: see text]V offered a [Formula: see text] of 60.39/79.87, 98.7/123.5, 101.1/124.1 and 103.8/124.1[Formula: see text]pS, respectively, and these hybrid CLA-CS wider bit-size adders showcased a [Formula: see text] of 188.1/148.5, 418.6/333.5, 850.4/674, and 1680/1350[Formula: see text][Formula: see text]W, respectively, at [Formula: see text]C/[Formula: see text]C. When the bit length is 16 or more, the proposed adder shows approximately similar delays, which indicate the size-independent speed performance of the new design. The new energy-efficient and high-speed wider bit-size FinFET-based hybrid adders are highly suitable for future signal-processing systems and IoT applications.

Efficient operation of deregulated electricity markets requires Optimal Power Flow (OPF) techniques that determine feasible operating conditions while minimizing network transmission losses under system constraints. Existing OPF formulations determine the optimal operating point but do not explicitly associate the optimized transmission losses with individual generators and consumers. The conventional Gravitational Search Algorithm exhibits limited convergence efficiency because its search process strongly depends on the quality of the initial population. To address this limitation, a two-stage initialized Modified Gravitational Search Algorithm (MGSA) is developed and integrated with a power flow tracing framework. The optimized transmission losses are then allocated to generators and loads using a tracing-based proportional sharing mechanism (PSM) to give the optimal loss an intuitive and fair allocation. The proposed framework is evaluated using IEEE 30-bus and Indian 24-bus benchmark systems and further compared with recent population-based optimization algorithms. With simulation and statistical analysis, MGSA provides lower transmission losses, faster convergence rates, improved computational efficiency and improved stability of solutions, and is therefore a promising approach for transparent transmission-loss allocation in deregulated electricity markets.

Road infrastructure plays a crucial role in transportation, and Potholes pose a significant threat to vehicle safety and maintenance costs. Traditional Pothole detection methods rely on manual inspection or expensive sensor-based systems, making them inefficient and costly. To address these challenges, we propose an IoT-based Pothole detection system utilizing an ESP8266 microcontroller, ultrasonic sensors, and a camera module. The system collects real-time road surface data, which is processed by a deep learning model techniques to detect Potholes accurately. The ESP8266 facilitates wireless data transmission to a central server for further analysis and mapping. This approach provides a cost-effective, automated, and scalable solution for road monitoring. By integrating to IoT and deep learning our system enhances Pothole detection 95% accuracy, reduces manual labour, and enables proactive road maintenance.

Tunnel field-effect transistors (TFETs) are considered to be promising devices for ultra-low-power and energy-efficient applications because of their steep subthreshold swing and low leakage current. In this work, a Z-shaped Gate source pocket TFET (ZSP-TFET) is designed and modeled using an ML-assisted modeling framework for efficiently predicting its electrical performance. This device features a source based on SiGe material, a silicon channel and a Z-shaped dual-gate architecture aimed at augmenting band-to-band tunneling and improving the electrostatic control. Extensive TCAD simulations have been performed to provide a complete dataset by changing critical device parameters: Oxide thickness ( t _ox ), Source pocket thickness ( t _sp ), Gate Work function (WF), Channel length ( L _ch ) and V _GS . Corresponding output parameters are the I _D and SS used to train and validate several ML regression models. Among the considered algorithms, the Random Forest Regressor (RFR) achieves much higher prediction accuracy due to its strong capability to model the nonlinear behaviour of ZSP-TFET. This proposed ML model yields a maximum R ² score of up to 99.41% with a minimum RMSE of 0.011 for the 90–10 split in training and testing datasets, respectively, which confirms excellent agreement between the simulated and predicted results. The parameter-wise validation of I _ON , I _OFF , and SS with regard to L _ch , t _ox , t _sp , and WF variations returns an R ² value above 0.99 for each case, which further establishes the robustness and reliability of the model performance. Moreover, comparative analysis among other ML algorithms establishes the efficacy of the applied RFR approach in predicting more accurate TFET performance. In this respect, the accomplished ML-assisted approach could reduce the computational cost significantly without sacrificing the accuracy of prediction. Therefore, this will be a strong tool for optimization and fast analyzing advanced TFET architectures such as ZSP-TFET.