Jun Yang
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Jun Yang has a total of 34 co-authors. Here are the top co-authors by number of shared publications:
- Youtao Zhang
University of Pittsburgh, Pittsburgh, PA, USA
10 shared publications - Xulong Tang
University of Pittsburgh
6 shared publications - Aditya Pawar
University of Pittsburgh, Pittsburgh, USA
4 shared publications - Yanan Guo
University of Rochester, Rochester, New York, USA
4 shared publications - Yingheng Li
University of Pittsburgh, Pittsburgh, USA
4 shared publications - Zewei Mo
University of Pittsburgh, Pittsburgh, PA, United States
3 shared publications
Latest Publications
- 23 September 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Micro
- Vol. 45 (4) , 6-10
Special Issue on Top Picks From the 2024 Computer Architecture Conferences
It is our great pleasure to present the IEEE Micro Special Issue on Top Picks From the 2024 Computer Architecture Conferences. This special issue upholds a long-standing tradition within the computer architecture community of recognizing outstanding research contributions. The articles featured herein were selected by the Top Picks Selection Committee for their exceptional novelty and strong potential for long-term impact on the field.
- 23 September 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Micro
- Vol. 45 (4) , 6-10
Special Issue on Top Picks From the 2024 Computer Architecture Conferences
It is our great pleasure to present the IEEE Micro Special Issue on Top Picks From the 2024 Computer Architecture Conferences. This special issue upholds a long-standing tradition within the computer architecture community of recognizing outstanding research contributions. The articles featured herein were selected by the Top Picks Selection Committee for their exceptional novelty and strong potential for long-term impact on the field.
- Open Access
- 20 June 2025
- Published by Association for Computing Machinery (ACM)
- p. 18-33
LightML: A Photonic Accelerator for Efficient General Purpose Machine Learning
- 20 June 2025
- Published by Association for Computing Machinery (ACM)
- p. 18-33
Open AccessLightML: A Photonic Accelerator for Efficient General Purpose Machine Learning
- Open Access
- 20 June 2025
- Published by Association for Computing Machinery (ACM)
- p. 1598-1612
Reinforcement Learning-Guided Graph State Generation in Photonic Quantum Computers
- 20 June 2025
- Published by Association for Computing Machinery (ACM)
- p. 1598-1612
Open AccessReinforcement Learning-Guided Graph State Generation in Photonic Quantum Computers
- Open Access
- 23 June 2024
- Published by Association for Computing Machinery (ACM)
- p. 1-6
FCM: A Fusion-aware Wire Cutting Approach for Measurement-based Quantum Computing
Measurement-based quantum computing (MBQC) is a promising quantum computing paradigm that carries out computation through one-way measurements on entangled photon qubits. Practical photonic hardware first generates a 2D mesh of resource states with each being a small number of entangled photon qubits and then exploits fusion operations to connect resource states to scale up the computation. Given that the fusion operation is highly error-prone, it is important to reduce the number of fusions for an MBQC circuit. In this paper, we propose FCM, a fusion-aware scheme that exploits wire cutting to improve the fidelity of MBQC. By cutting a large MBQC circuit into several smaller subcircuits, FCM effectively reduces the number of fusions in each subcircuit and thus improves the computation fidelity. Given circuit cutting requires classical post-processing to combine the results of subcircuits, FCM strives to achieve the best cutting strategy under different settings. Evaluation of representative benchmarks demonstrates that, when cutting a large circuit to two subcircuits, FCM reduces the maximum number of fusions of all subcircuits by 59.6% on average (up to 69.1%).
- 23 June 2024
- Published by Association for Computing Machinery (ACM)
- p. 1-6
Open AccessFCM: A Fusion-aware Wire Cutting Approach for Measurement-based Quantum Computing
Measurement-based quantum computing (MBQC) is a promising quantum computing paradigm that carries out computation through one-way measurements on entangled photon qubits. Practical photonic hardware first generates a 2D mesh of resource states with each being a small number of entangled photon qubits and then exploits fusion operations to connect resource states to scale up the computation. Given that the fusion operation is highly error-prone, it is important to reduce the number of fusions for an MBQC circuit. In this paper, we propose FCM, a fusion-aware scheme that exploits wire cutting to improve the fidelity of MBQC. By cutting a large MBQC circuit into several smaller subcircuits, FCM effectively reduces the number of fusions in each subcircuit and thus improves the computation fidelity. Given circuit cutting requires classical post-processing to combine the results of subcircuits, FCM strives to achieve the best cutting strategy under different settings. Evaluation of representative benchmarks demonstrates that, when cutting a large circuit to two subcircuits, FCM reduces the maximum number of fusions of all subcircuits by 59.6% on average (up to 69.1%).
- Open Access
- 30 May 2024
- Published by Association for Computing Machinery (ACM)
- p. 376-387
RTT-UAF: Reuse Time Tracking for Use-After-Free Detection
Memory safety continues to be a critical challenge in modern computing, with approximately 70% of reported vulnerabilities annually attributed to memory-related issues. Among these issues, Use-After-Free (UAF) vulnerabilities or bugs, where a program accesses memory through a dangling pointer, pose significant threats. Existing UAF detection methods, such as Key-And-Lock (KAL) mechanisms, incur notable performance overhead due to explicitly propagating the key and lock address (metadata). We identify that approximately 67% of KAL’s performance overhead is introduced by this metadata propagation. This paper introduces RTT, which significantly reduces performance overhead by reducing the number of memory accesses related to metadata propagation. RTT achieves an average performance overhead of 170%, substantially lower than existing KAL methods, and incurs only an 8% memory overhead on SPEC CPU 2017. The results of experimental evaluations on real-world UAF bugs further demonstrate that RTT’s UAF bug detection rate is equivalent to other KAL methods.
- 30 May 2024
- Published by Association for Computing Machinery (ACM)
- p. 376-387
Open AccessRTT-UAF: Reuse Time Tracking for Use-After-Free Detection
Memory safety continues to be a critical challenge in modern computing, with approximately 70% of reported vulnerabilities annually attributed to memory-related issues. Among these issues, Use-After-Free (UAF) vulnerabilities or bugs, where a program accesses memory through a dangling pointer, pose significant threats. Existing UAF detection methods, such as Key-And-Lock (KAL) mechanisms, incur notable performance overhead due to explicitly propagating the key and lock address (metadata). We identify that approximately 67% of KAL’s performance overhead is introduced by this metadata propagation. This paper introduces RTT, which significantly reduces performance overhead by reducing the number of memory accesses related to metadata propagation. RTT achieves an average performance overhead of 170%, substantially lower than existing KAL methods, and incurs only an 8% memory overhead on SPEC CPU 2017. The results of experimental evaluations on real-world UAF bugs further demonstrate that RTT’s UAF bug detection rate is equivalent to other KAL methods.
- Open Access
- 10 April 2024
- Published by Association for Computing Machinery (ACM)
- p. 111-126
FMCC: Flexible Measurement-based Quantum Computation over Cluster State
- 10 April 2024
- Published by Association for Computing Machinery (ACM)
- p. 111-126
Open AccessFMCC: Flexible Measurement-based Quantum Computation over Cluster State
- Open Access
- 10 April 2024
- Published by Association for Computing Machinery (ACM)
- p. 236-251
QRCC: Evaluating Large Quantum Circuits on Small Quantum Computers through Integrated Qubit Reuse and Circuit Cutting
- 10 April 2024
- Published by Association for Computing Machinery (ACM)
- p. 236-251
Open AccessQRCC: Evaluating Large Quantum Circuits on Small Quantum Computers through Integrated Qubit Reuse and Circuit Cutting
- Open Access
- 28 October 2023
- Published by Association for Computing Machinery (ACM)
- p. 1163-1177
IDYLL: Enhancing Page Translation in Multi-GPUs via Light Weight PTE Invalidations
Multi-GPU systems have emerged as a desirable platform to deliver high computing capabilities and large memory capacity to accommodate large dataset sizes. However, naively employing multi-GPU incurs non-scalable performance. One major reason is that execution efficiency suffers expensive address translations in multi-GPU systems. The data-sharing nature of GPU applications requires page migration between GPUs to mitigate non-uniform memory access overheads. Unfortunately, frequent page migration incurs substantial page table invalidation overheads to ensure translation coherence. A comprehensive investigation of multi-GPU address translation efficiency identifies two significant bottlenecks caused by page table invalidation requests: (i) increased latency for demand TLB miss requests and (ii) increased waiting latency for performing page migrations. Based on observations, we propose IDYLL, which reduces the number of page table invalidations by maintaining an “in-PTE" directory and reduces invalidation latency by batching multiple invalidation requests to exploit spatial locality. We show that IDYLL improves overall performance by 69.9% on average.
- 28 October 2023
- Published by Association for Computing Machinery (ACM)
- p. 1163-1177
Open AccessIDYLL: Enhancing Page Translation in Multi-GPUs via Light Weight PTE Invalidations
Multi-GPU systems have emerged as a desirable platform to deliver high computing capabilities and large memory capacity to accommodate large dataset sizes. However, naively employing multi-GPU incurs non-scalable performance. One major reason is that execution efficiency suffers expensive address translations in multi-GPU systems. The data-sharing nature of GPU applications requires page migration between GPUs to mitigate non-uniform memory access overheads. Unfortunately, frequent page migration incurs substantial page table invalidation overheads to ensure translation coherence. A comprehensive investigation of multi-GPU address translation efficiency identifies two significant bottlenecks caused by page table invalidation requests: (i) increased latency for demand TLB miss requests and (ii) increased waiting latency for performing page migrations. Based on observations, we propose IDYLL, which reduces the number of page table invalidations by maintaining an “in-PTE" directory and reduces invalidation latency by batching multiple invalidation requests to exploit spatial locality. We show that IDYLL improves overall performance by 69.9% on average.
- Open Access
- 28 October 2023
- Published by Association for Computing Machinery (ACM)
- p. 843-855
Uncore Encore: Covert Channels Exploiting Uncore Frequency Scaling
Modern processors dynamically adjust clock frequencies and voltages to reduce energy consumption. Recent Intel processors separate the uncore frequency from the core frequency, using Uncore Frequency Scaling (UFS) to adapt the uncore frequency to various workloads. While UFS improves power efficiency, it also introduces security vulnerabilities. In this paper, we study the feasibility of covert channels exploiting UFS. First, we conduct a series of experiments to understand the details of UFS, such as the factors that can cause uncore frequency variations. Then, based on the results, we build the first UFS-based covert channel, UF-variation, which works both across-cores and across-processors. Finally, we analyze the robustness of UF-variation under known defense mechanisms against uncore covert channels, and show that UF-variation remains functional even with those defenses in place.
- 28 October 2023
- Published by Association for Computing Machinery (ACM)
- p. 843-855
Open AccessUncore Encore: Covert Channels Exploiting Uncore Frequency Scaling
Modern processors dynamically adjust clock frequencies and voltages to reduce energy consumption. Recent Intel processors separate the uncore frequency from the core frequency, using Uncore Frequency Scaling (UFS) to adapt the uncore frequency to various workloads. While UFS improves power efficiency, it also introduces security vulnerabilities. In this paper, we study the feasibility of covert channels exploiting UFS. First, we conduct a series of experiments to understand the details of UFS, such as the factors that can cause uncore frequency variations. Then, based on the results, we build the first UFS-based covert channel, UF-variation, which works both across-cores and across-processors. Finally, we analyze the robustness of UF-variation under known defense mechanisms against uncore covert channels, and show that UF-variation remains functional even with those defenses in place.