J. Blair Perot

This paper presents a number of innovations for the calculation of elliptic integrals. These improvements are specifically designed to be attractive for computational physics and engineering problems where these integrals frequently arise. First, the paper presents a novel symmetric form for elliptic integrals that uses as inputs the two (or fewer) dimensionless matrix invariants from the physics problem statement rather than the current practice for elliptic integrals of using three eigenvalues which must be expensively computed from those invariants. This proposed formulation of elliptic integrals in terms of the physics inputs rather than in terms of mathematical inputs then leads to a number of practical innovations: (1) simpler 2D visualization of the problem, (2) a new and far more accurate univariate expansion around the axisymmetric state, rather than the current slower bivariate expansion about the more remote spherical state. (3) the first direct duplication formula for elliptic integrals of the second type, and (4) a novel invariant-preserving duplication formula for all elliptic integrals. The usefulness of these innovations is then demonstrated on the universally well understood problem of finding the surface area of an ellipsoid. Virtually all possible situations are tested, using a million different shaped ellipsoids with aspect ratios ranging up to 10,000. It is shown that the proposed approach is on average at least three times as fast computationally as the current state of the art.

Vector matrix multiplication computation underlies major applications in machine vision, deep learning, and scientific simulation. These applications require high computational speed and are run on platforms that are size, weight, and power constrained. With the transistor scaling coming to an end, existing digital hardware architectures will not be able to meet this increasing demand. Analog computation with its rich set of primitives and inherent parallel architecture can be faster, more efficient, and compact for some of these applications. One such primitive is a memristor-CMOS crossbar array-based vector matrix multiplication. In this article, we develop a memristor-CMOS analog coprocessor architecture that can handle floating-point computation. To demonstrate the working of the analog coprocessor at a system level, we use a new electronic design automation tool called PSpice Systems Option, which performs integrated cosimulation of MATLAB/Simulink and PSpice. It is shown that the analog coprocessor has a superior performance when compared to other processors, and a speedup of up to 12 × when compared to projected GPU performance is observed. Using the new PSpice Systems Option tool, various application simulations for image processing and solutions to partial differential equations are performed on the analog coprocessor model.

Wind turbine farms suffer from wake losses, where the downstream turbines generate less power, and/or the leading turbines are throttled to reduce the downstream power losses. In this paper, we focus on possible external modifications that can enhance the wind turbines' performance when they are operating in a farm environment. In particular, this study is interested in enhancing the performance of the downstream turbines in wind farms. The idea is to move each turbine's wake down and away from subsequent turbines. This goal is achieved by using stationary external airfoils that are placed in proximity to the rotating blades. A number of different designs are tested and the design concepts are tested using Reynolds‐Averaged Navier‐Stokes simulations of an aligned array of 2 wind turbines. The turbines are modeled as actuator disks with axial induction and are placed in a velocity field that is modeled as a turbulent atmospheric boundary layer. It is found that fixed external airfoils can enable partial or full power recovery at turbine separations of as small as 3 rotor diameters downstream. We will also demonstrate that some devices can also improve the performance of the upstream turbine. The physical reasons for these power recovery phenomena are discussed.

Kinetic studies of biological macromolecules increasingly use microfluidic mixers to initiate and monitor reaction progress. A motivation for using microfluidic mixers is to reduce sample consumption and decrease mixing time to microseconds. Some applications, such as small-angle x-ray scattering, also require large (>10 micron) sampling areas to ensure high signal-to-noise ratios and to minimize parasitic scattering. Chaotic to marginally turbulent mixers are well suited for these applications because this class of mixers provides a good middle ground between existing laminar and turbulent mixers. In this study, we model various chaotic to marginally turbulent mixing concepts such as flow turning, flow splitting, and vortex generation using computational fluid dynamics for optimization of mixing efficiency and observation volume. Design iterations show flow turning to be the best candidate for chaotic/marginally turbulent mixing. A qualitative experimental test is performed on the finalized design with mixing of 10 M urea and water to validate the flow turning unsteady mixing concept as a viable option for RNA and protein folding studies. A comparison of direct numerical simulations (DNS) and turbulence models suggests that the applicability of turbulence models to these flow regimes may be limited.

Vector matrix multiplication computation underlies major applications in machine vision, deep learning and scientific simulation. These applications require high computational speed and are run on platforms that are size, weight and power constrained. With the transistor scaling coming to an end, existing digital hardware architectures will not be able to meet this increasing demand. Analog computation with its rich set of primitives and inherent parallel architecture can be faster, more efficient and compact for some of these applications. One such primitive is a memristor-CMOS crossbar array based vector matrix multiplication. In this paper, we develop a memristor-CMOS analog co-processor architecture that can handle floating point computation. The crossbar array is based on a TaOx memristor device. To demonstrate the working of the analog co-processor at a system level, we use a new tool developed by Cadence and Mathworks called PSpice Systems Option which performs integrated co-simulation of MATLAB/Simulink and PSpice. It is shown that the analog co-processor has a superior performance when compared to other processors. Using the new PSpice Systems Option tool, various application simulations for image processing and solution to partial differential equations are performed on the analog coprocessor model.