Dinesh Pamunuwa
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Previous Organizations / Institutes
The organizations / institutes from the scholar's other articles in the past ten years
Dinesh Pamunuwa has a total of 56 co-authors. Here are the top co-authors by number of shared publications:
Elliott Worsey
Department of Electrical and Electronic Engineering, University of Bristol, Bristol, U.K
6 shared publications- Frank Niklaus
Division of Micro and Nanosystems, Royal Institute of Technology (KTH), Stockholm, Sweden
6 shared publications - Sunil Rana
Chemical Engineering and Process Development Division, CSIR - National Chemical Laboratory, Pune 411008, India
5 shared publications - Harold M. H. Chong
School of Electronics and Computer Science, University of Southampton, Southampton, U.K.
4 shared publications - Mukesh Kumar Kulsreshath
School of Electrical, Electronic and Mechanical Engineering, University of Bristol, Bristol, U.K.
4 shared publications - Simon J. Bleiker
Division of Micro and Nanosystems, Royal Institute of Technology (KTH), Stockholm, Sweden
4 shared publications
Latest Publications
- 13 April 2026
- Published by Institute of Electrical and Electronics Engineers (IEEE) in Journal of Microelectromechanical Systems
- Vol. 35 (3) , 372-374
Nanoelectromechanical Voltage-to-Time Converter for Low-Power IoT Devices
Nanoelectromechanical (NEM) relays have emerged as a compelling alternative to solid-state switches for digital logic and power gating due to their near-zero off-state leakage and abrupt turn on/off characteristics. Here, we demonstrate a novel application of a dual-beam, 4-terminal NEM relay to function as a direct voltage comparator for Pulse-Width-Modulation (PWM) encoding in Voltage-to-Time converter (VTC) applications. A prototype device with an actuation airgap of 400nm was fabricated on a silicon-on-insulator substrate and the switch contact features were coated with ruthenium to improve the cycling lifetime. The pull-in and pull-out voltages of the relay were measured to be 13.21 V and 10.22 V, respectively. In subsequent experiments the relay successfully converted a slow sinusoidal signal into a duty-cycle-modulated output. Although the input frequency was deliberately kept low to accommodate reliability issues in the prototype, this work serves as a proof-of-concept to showcase the potential of using our 4-T NEM relay as a building block in VTC applications at the edge of the network.
- 13 April 2026
- Published by Institute of Electrical and Electronics Engineers (IEEE) in Journal of Microelectromechanical Systems
- Vol. 35 (3) , 372-374
Nanoelectromechanical Voltage-to-Time Converter for Low-Power IoT Devices
Nanoelectromechanical (NEM) relays have emerged as a compelling alternative to solid-state switches for digital logic and power gating due to their near-zero off-state leakage and abrupt turn on/off characteristics. Here, we demonstrate a novel application of a dual-beam, 4-terminal NEM relay to function as a direct voltage comparator for Pulse-Width-Modulation (PWM) encoding in Voltage-to-Time converter (VTC) applications. A prototype device with an actuation airgap of 400nm was fabricated on a silicon-on-insulator substrate and the switch contact features were coated with ruthenium to improve the cycling lifetime. The pull-in and pull-out voltages of the relay were measured to be 13.21 V and 10.22 V, respectively. In subsequent experiments the relay successfully converted a slow sinusoidal signal into a duty-cycle-modulated output. Although the input frequency was deliberately kept low to accommodate reliability issues in the prototype, this work serves as a proof-of-concept to showcase the potential of using our 4-T NEM relay as a building block in VTC applications at the edge of the network.
- 19 January 2026
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 47 (3) , 598-601
A CMOS-Compatible Heterogeneous 3-D Integration Platform for Silicon Nanoelectromechanical Switches
Nanoelectromechanical (NEM) switches have near vertical turn-off transient, zero off-state leakage, and non-volatile behavior, ideal qualities for low power computing and memory applications. To realize this potential, large-scale integration of NEM switches is required. Here we introduce a three-dimensional (3-D) heterogeneous integration platform that leverages a standard silicon-on-insulator (SOI) CMOS foundry process, combined with post-processing of the foundry wafers to integrate silicon NEM switches. Within this platform, we seamlessly integrated both volatile 3-terminal (3-T) and non-volatile 7-terminal (7-T) NEM switches. We demonstrate successful electrical programming and reprogramming of both switch types, validating the platform’s functionality and its potential for constructing densely integrated NEM switch-based logic circuits and non-volatile memories.
- 19 January 2026
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 47 (3) , 598-601
A CMOS-Compatible Heterogeneous 3-D Integration Platform for Silicon Nanoelectromechanical Switches
Nanoelectromechanical (NEM) switches have near vertical turn-off transient, zero off-state leakage, and non-volatile behavior, ideal qualities for low power computing and memory applications. To realize this potential, large-scale integration of NEM switches is required. Here we introduce a three-dimensional (3-D) heterogeneous integration platform that leverages a standard silicon-on-insulator (SOI) CMOS foundry process, combined with post-processing of the foundry wafers to integrate silicon NEM switches. Within this platform, we seamlessly integrated both volatile 3-terminal (3-T) and non-volatile 7-terminal (7-T) NEM switches. We demonstrate successful electrical programming and reprogramming of both switch types, validating the platform’s functionality and its potential for constructing densely integrated NEM switch-based logic circuits and non-volatile memories.
- 19 February 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 72 (4) , 1969-1976
Energy Consumption in Micro- and Nanoelectromechanical Relays
Electrostatically operated micro-and nanoelectromechanical (MEM/NEM) relays have been proposed as digital switches to replace transistors due to their sharp turn-on/off transient, zero leakage current between drain and source in the OFF-state, and capability to operate at far higher temperatures and radiation levels than CMOS. However, the different components associated with energy consumption in MEM/NEM relays, including the dynamic energy associated with charging the gate capacitance and static energy lost through substrate leakage, have not been investigated to date. Here, we present a detailed analysis of the energy consumption of NEM/MEM relays starting from first principles and compare against measurements carried out on silicon MEM relay prototypes. The dynamic energy consumed by a transistor in a binary switching transfer is accurately captured by 0.5CV2. This expression, which has also been used for relays, is only valid under the approximation of an unvarying capacitance C. However, the gate capacitance of an MEM/NEM relay varies as a function of gate voltage, as it is determined by the airgap between the gate electrode and the moving beam. We show how including this effect adds an extra term to the dynamic energy consumption expression. Furthermore, we investigate different current leakage mechanisms and devise a new method to estimate the substrate leakage current based on using the switching hysteresis of relays. The models, analyses, and measurement methodologies presented here constitute a set of essential techniques for accurate estimation of the energy consumption of MEM/NEM relays in ultralow power circuit applications.
- 19 February 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 72 (4) , 1969-1976
Energy Consumption in Micro- and Nanoelectromechanical Relays
Electrostatically operated micro-and nanoelectromechanical (MEM/NEM) relays have been proposed as digital switches to replace transistors due to their sharp turn-on/off transient, zero leakage current between drain and source in the OFF-state, and capability to operate at far higher temperatures and radiation levels than CMOS. However, the different components associated with energy consumption in MEM/NEM relays, including the dynamic energy associated with charging the gate capacitance and static energy lost through substrate leakage, have not been investigated to date. Here, we present a detailed analysis of the energy consumption of NEM/MEM relays starting from first principles and compare against measurements carried out on silicon MEM relay prototypes. The dynamic energy consumed by a transistor in a binary switching transfer is accurately captured by 0.5CV2. This expression, which has also been used for relays, is only valid under the approximation of an unvarying capacitance C. However, the gate capacitance of an MEM/NEM relay varies as a function of gate voltage, as it is determined by the airgap between the gate electrode and the moving beam. We show how including this effect adds an extra term to the dynamic energy consumption expression. Furthermore, we investigate different current leakage mechanisms and devise a new method to estimate the substrate leakage current based on using the switching hysteresis of relays. The models, analyses, and measurement methodologies presented here constitute a set of essential techniques for accurate estimation of the energy consumption of MEM/NEM relays in ultralow power circuit applications.
- 6 February 2024
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 45 (4) , 728-731
Digital Nanoelectromechanical Non-Volatile Memory Cell
Nanoelectromechanical relays are inherently radiation hard and can operate at high temperatures. Thus, they have potential to serve as the building blocks in non-volatile memory that can be used in harsh environments with zero standby power. However, a reprogrammable memory cell built entirely from relays that can be operated with a digital protocol has not yet been demonstrated. Here, we demonstrate a fully mechanical digital non-volatile memory cell built from in-plane silicon nanoelectromechanical relays; a 7-terminal bistable relay utilizes surface adhesion forces to store binary data without consuming any energy, while 3-terminal relays are used for read and write access without the need for CMOS. We have optimized the designs to prevent collapse to the substrate under actuation and recorded voltages of 13, 13.2 and 27V for programming, read and reprogramming operations. This non-volatile memory cell can potentially be used to build embedded memories for edge applications that have stringent temperature, radiation and energy constraints.
- 6 February 2024
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 45 (4) , 728-731
Digital Nanoelectromechanical Non-Volatile Memory Cell
Nanoelectromechanical relays are inherently radiation hard and can operate at high temperatures. Thus, they have potential to serve as the building blocks in non-volatile memory that can be used in harsh environments with zero standby power. However, a reprogrammable memory cell built entirely from relays that can be operated with a digital protocol has not yet been demonstrated. Here, we demonstrate a fully mechanical digital non-volatile memory cell built from in-plane silicon nanoelectromechanical relays; a 7-terminal bistable relay utilizes surface adhesion forces to store binary data without consuming any energy, while 3-terminal relays are used for read and write access without the need for CMOS. We have optimized the designs to prevent collapse to the substrate under actuation and recorded voltages of 13, 13.2 and 27V for programming, read and reprogramming operations. This non-volatile memory cell can potentially be used to build embedded memories for edge applications that have stringent temperature, radiation and energy constraints.
- Open Access
- 15 November 2023
- Published by Royal Society of Chemistry (RSC) in Nanoscale
- Vol. 15 (46) , 18940
Correction: Integrated 4-terminal single-contact nanoelectromechanical relays implemented in a silicon-on-insulator foundry process
Correction for ‘Integrated 4-terminal single-contact nanoelectromechanical relays implemented in a silicon-on-insulator foundry process’ by Yingying Li et al., Nanoscale, 2023, https://doi.org/10.1039/d3nr03429a.
- 15 November 2023
- Published by Royal Society of Chemistry (RSC) in Nanoscale
- Vol. 15 (46) , 18940
Open AccessCorrection: Integrated 4-terminal single-contact nanoelectromechanical relays implemented in a silicon-on-insulator foundry process
Correction for ‘Integrated 4-terminal single-contact nanoelectromechanical relays implemented in a silicon-on-insulator foundry process’ by Yingying Li et al., Nanoscale, 2023, https://doi.org/10.1039/d3nr03429a.
- Open Access
- 6 September 2022
- Published by Wiley in Advanced Electronic Materials
- Vol. 9 (1)
Single‐Contact, Four‐Terminal Microelectromechanical Relay for Efficient Digital Logic
Nano and microelectromechanical relays can be used in lieu of transistors to build digital integrated circuits that can operate with zero leakage current at high operating temperatures and radiation levels. Four‐terminal (4‐T) relays facilitate efficient logic circuits with greatly reduced device counts compared to three‐terminal (3‐T) relay implementations. Existing 4‐T relays, however, require two moving contacts to simultaneously land on two stationary electrodes, which can adversely impact reliability, or have complex out‐of‐plane fabrication methods that can reduce yield and increase cost while having poor scalability. In this work an in‐plane four‐terminal relay with a single moving contact is demonstrated for the first time, through successful fabrication and characterization of prototypes with a critical dimension of 1.5 µm. Body biasing is shown to reduce the pull‐in voltage of this 4‐T relay compared to a 3‐T relay with the same architecture and footprint. The potential of the 4‐T relay to build efficient logic circuits is demonstrated by fabricating and characterizing a 1‐to‐2 demultiplexer (DEMUX) circuit using only two devices, a saving of eight devices over a 3‐T relay implementation.
- 6 September 2022
- Published by Wiley in Advanced Electronic Materials
- Vol. 9 (1)
Open AccessSingle‐Contact, Four‐Terminal Microelectromechanical Relay for Efficient Digital Logic
Nano and microelectromechanical relays can be used in lieu of transistors to build digital integrated circuits that can operate with zero leakage current at high operating temperatures and radiation levels. Four‐terminal (4‐T) relays facilitate efficient logic circuits with greatly reduced device counts compared to three‐terminal (3‐T) relay implementations. Existing 4‐T relays, however, require two moving contacts to simultaneously land on two stationary electrodes, which can adversely impact reliability, or have complex out‐of‐plane fabrication methods that can reduce yield and increase cost while having poor scalability. In this work an in‐plane four‐terminal relay with a single moving contact is demonstrated for the first time, through successful fabrication and characterization of prototypes with a critical dimension of 1.5 µm. Body biasing is shown to reduce the pull‐in voltage of this 4‐T relay compared to a 3‐T relay with the same architecture and footprint. The potential of the 4‐T relay to build efficient logic circuits is demonstrated by fabricating and characterizing a 1‐to‐2 demultiplexer (DEMUX) circuit using only two devices, a saving of eight devices over a 3‐T relay implementation.
- 4 January 2022
- Published by Institute of Electrical and Electronics Engineers (IEEE) in Journal of Microelectromechanical Systems
- Vol. 31 (2) , 283-291
Theory, Design, and Characterization of Nanoelectromechanical Relays for Stiction-Based Non-Volatile Memory
Diverse areas such as the Internet of Things (IoT), aerospace and industrial electronics increasingly require non-volatile memory to work under high-temperature, radiation-hard conditions, with zero standby power. Nanoelectromechanical (NEM) relays uniquely have the potential to work at 300 °C and absorb high levels of radiation, with zero leakage current across the entire operational range. While NEM relays that utilise stiction for non-volatile operation have been demonstrated, it is not clear how to design a relay to reliably achieve given programming and reprogramming voltages, an essential requirement in producing a memory. Here, we develop an analytical, first-principle physics-based model of rotational NEM relays to provide detailed understanding of how the programming and reprogramming voltages vary based on the device dimensions and surface adhesion force. We then carry out an experimental parametric study of relays with a critical dimension of $\approx ~\mathrm {80~~\, \text {n} \text {m} }$ to characterise the surface adhesion force, and derive guidelines for how a NEM relay should be dimensioned for a given contact surface force, feature size constraints and operating requirements. We carry out a scaling study to show that voltages of $\approx ~\mathrm {1~~\, \text {V}}$ and a footprint under $\approx ~\mathrm {2~~\, \mu \text {m} ^{2}}$ can be achieved with a critical dimension of $\approx ~\mathrm {10~~\, \text {n} \text {m} }$ , with this device architecture. [2021-0138]
- 4 January 2022
- Published by Institute of Electrical and Electronics Engineers (IEEE) in Journal of Microelectromechanical Systems
- Vol. 31 (2) , 283-291
Theory, Design, and Characterization of Nanoelectromechanical Relays for Stiction-Based Non-Volatile Memory
Diverse areas such as the Internet of Things (IoT), aerospace and industrial electronics increasingly require non-volatile memory to work under high-temperature, radiation-hard conditions, with zero standby power. Nanoelectromechanical (NEM) relays uniquely have the potential to work at 300 °C and absorb high levels of radiation, with zero leakage current across the entire operational range. While NEM relays that utilise stiction for non-volatile operation have been demonstrated, it is not clear how to design a relay to reliably achieve given programming and reprogramming voltages, an essential requirement in producing a memory. Here, we develop an analytical, first-principle physics-based model of rotational NEM relays to provide detailed understanding of how the programming and reprogramming voltages vary based on the device dimensions and surface adhesion force. We then carry out an experimental parametric study of relays with a critical dimension of $\approx ~\mathrm {80~~\, \text {n} \text {m} }$ to characterise the surface adhesion force, and derive guidelines for how a NEM relay should be dimensioned for a given contact surface force, feature size constraints and operating requirements. We carry out a scaling study to show that voltages of $\approx ~\mathrm {1~~\, \text {V}}$ and a footprint under $\approx ~\mathrm {2~~\, \mu \text {m} ^{2}}$ can be achieved with a critical dimension of $\approx ~\mathrm {10~~\, \text {n} \text {m} }$ , with this device architecture. [2021-0138]
- Open Access
- 14 December 2020
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Power Electronics
- Vol. 36 (7) , 8267-8279
Full Custom Design of an Arbitrary Waveform Gate Driver With 10-GHz Waypoint Rates for GaN FETs
Active gate driving of power devices seeks to shape switching trajectories via the gate, for example to reduce EMI without degrading efficiency. To this end, driver ICs with integrated arbitrary waveform generators have been used to achieve complex gate signals. In this paper, we describe for the first time the implementation details of a digitally programmable arbitrary waveform gate driver capable of a 10 GHz waypoint rate, including comprehensive design considerations for critical high-speed subsystems that codify the trade-off in flexibility, speed and area. Our design, which is taped out in a 180 nm high-voltage CMOS process, utilises buffers that switch up to ten times in a single clock cycle to overcome the limited achievable clock-speed of high-voltage silicon integrated circuits, and a fully digital architecture to provide robustness under high slew-rates of the ground rail. The driver IC has networks of 100 ps delay elements that are digitally configured prior to a switching transient, to selectively control an array of fast, parallel-connected drivers with different output impedances. Key to the high timing resolution are high-speed asynchronous circuits for memory readout, output buffering and pulse generation. The driver IC is experimentally evaluated to have a 100 ps resolution, and to operate reliably in a 400 V GaN bridge leg, under ground-rail voltage slew rates peaking at over 100 V/ns. Design rules are provided to obtain an architecture with the least area for a given set of timing and impedance resolution requirements. The reported design methods enable complex driving waveforms to be applied during nanosecond-scale transients of GaN power devices and demonstrate how digitally-programmable active gate drivers for GaN power FETs can be designed to meet a given set of application requirements.
- 14 December 2020
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Power Electronics
- Vol. 36 (7) , 8267-8279
Open AccessFull Custom Design of an Arbitrary Waveform Gate Driver With 10-GHz Waypoint Rates for GaN FETs
Active gate driving of power devices seeks to shape switching trajectories via the gate, for example to reduce EMI without degrading efficiency. To this end, driver ICs with integrated arbitrary waveform generators have been used to achieve complex gate signals. In this paper, we describe for the first time the implementation details of a digitally programmable arbitrary waveform gate driver capable of a 10 GHz waypoint rate, including comprehensive design considerations for critical high-speed subsystems that codify the trade-off in flexibility, speed and area. Our design, which is taped out in a 180 nm high-voltage CMOS process, utilises buffers that switch up to ten times in a single clock cycle to overcome the limited achievable clock-speed of high-voltage silicon integrated circuits, and a fully digital architecture to provide robustness under high slew-rates of the ground rail. The driver IC has networks of 100 ps delay elements that are digitally configured prior to a switching transient, to selectively control an array of fast, parallel-connected drivers with different output impedances. Key to the high timing resolution are high-speed asynchronous circuits for memory readout, output buffering and pulse generation. The driver IC is experimentally evaluated to have a 100 ps resolution, and to operate reliably in a 400 V GaN bridge leg, under ground-rail voltage slew rates peaking at over 100 V/ns. Design rules are provided to obtain an architecture with the least area for a given set of timing and impedance resolution requirements. The reported design methods enable complex driving waveforms to be applied during nanosecond-scale transients of GaN power devices and demonstrate how digitally-programmable active gate drivers for GaN power FETs can be designed to meet a given set of application requirements.
- Open Access
- 4 March 2020
- Published by Springer Nature in Nature Communications
- Vol. 11 (1) , 1-10
Nanoelectromechanical relay without pull-in instability for high-temperature non-volatile memory
Emerging applications such as the Internet-of-Things and more-electric aircraft require electronics with integrated data storage that can operate in extreme temperatures with high energy efficiency. As transistor leakage current increases with temperature, nanoelectromechanical relays have emerged as a promising alternative. However, a reliable and scalable non-volatile relay that retains its state when powered off has not been demonstrated. Part of the challenge is electromechanical pull-in instability, causing the beam to snap in after traversing a section of the airgap. Here we demonstrate an electrostatically actuated nanoelectromechanical relay that eliminates electromechanical pull-in instability without restricting the dynamic range of motion. It has several advantages over conventional electrostatic relays, including low actuation voltages without extreme reduction in critical dimensions and near constant actuation airgap while the device moves, for improved electrostatic control. With this nanoelectromechanical relay we demonstrate the first high-temperature non-volatile relay operation, with over 40 non-volatile cycles at 200 ∘C.
- 4 March 2020
- Published by Springer Nature in Nature Communications
- Vol. 11 (1) , 1-10
Open AccessNanoelectromechanical relay without pull-in instability for high-temperature non-volatile memory
Emerging applications such as the Internet-of-Things and more-electric aircraft require electronics with integrated data storage that can operate in extreme temperatures with high energy efficiency. As transistor leakage current increases with temperature, nanoelectromechanical relays have emerged as a promising alternative. However, a reliable and scalable non-volatile relay that retains its state when powered off has not been demonstrated. Part of the challenge is electromechanical pull-in instability, causing the beam to snap in after traversing a section of the airgap. Here we demonstrate an electrostatically actuated nanoelectromechanical relay that eliminates electromechanical pull-in instability without restricting the dynamic range of motion. It has several advantages over conventional electrostatic relays, including low actuation voltages without extreme reduction in critical dimensions and near constant actuation airgap while the device moves, for improved electrostatic control. With this nanoelectromechanical relay we demonstrate the first high-temperature non-volatile relay operation, with over 40 non-volatile cycles at 200 ∘C.