Daniele Garbin

Arsenic‐free ovonic threshold switch (OTS) materials are important for enabling sustainable selector devices in high‐density crossbar memory arrays. Guided by ab initio design, we investigate Si‐doped GeS ₂ as a promising candidate, offering improved thermal stability and reduced leakage compared to alternative arsenic‐free materials. Thin films with up to 10% Si content were deposited by cosputtering and demonstrated thermal stability above 500°C. Device electrical characterization revealed good I _OFF performance comparable to reference SiGeAsSe devices. These results position Si‐doped GeS ₂ as a viable candidate for environmentally friendly, arsenic‐free OTS selectors, with further optimization needed to address endurance limitations.

In this study, we investigated the effect of pulse falling time (Tfall) on the electrical characteristics of SiGeAsSebased selector-only memory (SOM) devices. Our experimental results demonstrate that increasing the Tfall leads to an increased threshold voltage (Vth) and reduced Vth drift in SiGeAsSe devices. The optimized devices exhibit a remarkable memory window (> 1 V) and significantly suppressed drift characteristics ( 10 mV/dec.). Electrical measurements at high temperatures demonstrate that Tfall is one of the important factors in material relaxation, and these improvements are attributed to the intentionally induced reconfiguration of the chalcogenide film. Furthermore, our results reveal that a suitable Tfall can effectively mitigate the degradation of the memory window at high temperatures. These findings afford valuable insights into the role of material relaxation in SOM devices, potentially aiding the development of high-performance memory devices.

In this article, we demonstrate physical reservoir computing (RC) in ovonic threshold switching (OTS) devices. We show that SiGeAsSe OTS is suitable as a physical reservoir because of the nonlinear change in the number of delocalized defects. With the combination of phase space reconstruction (PSR), our algorithm can project data into high-dimensional spaces, thereby enhancing the distinguishability of the data. Such ability is suitable for high-accuracy authentication and classification. Our algorithm can be implemented using both crossbar arrays or individual devices, and achieves a significantly low (0.08%) equal error rate (EER) on gait authentication in simulation. Furthermore, we validated our concept by successfully implementing the algorithm on nine hardware OTS devices and achieved an EER of 4.2% on gait authentication. The low leakage current level of OTS, the fast learning of RC, and interval-based readout responses all contribute to a significantly reduced energy consumption of our proposed method.

In this work, we experimentally validate our theoretical framework for the ab initio screening of new, sustainable materials for ovonic threshold switching (OTS) applications, avoiding elements, such as As and Se that are associated with a high health and safety risk. We demonstrate that the newly designed Sn-S-based OTS ternary alloys are electrically functional and investigate the links between material properties and electrical performance. Results indicate that the Sn-S material system is a promising candidate for OTS selector and memory applications. Our findings open new research paths for further composition optimization aimed at bridging the performance gap with the state-of-the-art materials based on As and Se. The experimental results will enable further refinement of the theoretical model and improve its prediction capabilities.

Herein, the operation of a GeSe ovonic threshold switch (OTS) is studied as a self‐selecting memory cell based on the polarity effect. From the observed operating current (I_op) dependence and area scaling behavior, the critical role of Joule heating in ensuring exceptionally large memory window in this material is confirmed. The underlying mechanism is further investigated by means of chemical analysis and is confirmed to be caused by polarity‐dependent atomic migration under high‐I_opregime, consistent with elemental segregation due to electronegativity contrast. More specifically, selective diffusion of Ge atoms through the TiN layer into negatively biased top electrode stack is observed. At the same time, there is no sign of a similar process for Se atoms under opposite voltage polarity. Based on these observations, a novel memory concept utilizing a selective diffusion barrier is proposed. Furthermore, under low‐I_opregime, no major composition change is observed, leaving room for alternative interpretation of the polarity effect under such conditions. Finally, it is demonstrated that functional GeSe OTS‐only memory is fabricated with atomic layer deposition, making it suitable for vertical 3D integration to enable low‐cost applications.

Restricted use of hazardous environmental chemicals is one important challenge that the semiconductor industry needs to face to improve its sustainability. Ovonic threshold switching (OTS) ternary compound materials used in memory selector devices contain As and Se. Engineering these elements out of these materials requires significant research effort. To facilitate this process, we performed systematic material screening for As/Se-free ternary materials, based on ab-initio simulations. To limit the large amount of possible chemical compositions to fewer promising candidates, we used physics-based material parameter filters like material stability, electronic properties, or change in polarizability. The OTS gauge concept is introduced as a computed parameter to estimate the probability of a material to show an OTS behavior. As a result, we identified 35 As/Se-free ternary alloy compositions for stand-alone OTS memory applications, as well as 12 compositions for RRAM selector applications. This work aims seeding the development of As/Se-free OTS materials.

Cross-point array architecture offers a path toward low-cost storage-class memory (SCM). However, it requires a selector, such as an ovonic threshold switch (OTS) in series with the memory element, thus increasing the complexity of the bit cell. Furthermore, phase change memory (PCM), typically targeted for SCM applications, is limited by its large RESET current. Therefore, there is a demand for a new easy-to-fabricate self-selecting memory cell, capable of overcoming the limitations of PCM. Here, we propose a self-rectifying OTS-only memory (SR-OTSM), thus greatly simplifying the integration process compared to conventional 1OTS–1PCM cell. This novel memory is enabled by the semi-persistent polarity-induced threshold voltage shift recently observed in OTS materials. We describe the operation of such a cell and discuss the unique properties of the memory effect in Si-Ge-As-Se OTS. Specifically, we demonstrate excellent memory performance in SiGeAsSe-based SR-OTSM: ultralow Write current ( $<$ 15 $\mu $ A, i.e., $<$ 0.6 MA/cm $^{\text{2}}\text{)}$ , fast Read/Write operation ( $\sim$ 10 ns) and good endurance ( $>$ 10 $^{\text{8}}$ cycles).