Paul Daniel Judge

Extending the use of dc–dc converters, such as the dual active bridge (DAB) to high voltage applications, will require voltage sharing among series-connected power devices. Initial solutions used snubber capacitors to limit voltage rise and balance the turn-off voltage. However, this mechanism is not viable at low currents, which leads to high capacitor discharge currents. The quasi-square-wave modular multilevel dc–dc converter (QSW-MMC) has been proposed as an option for high voltage DAB converters. This circuit employs an additional switch in series with the capacitor, which acts as a controlled voltage clamp. This avoids problems at low loading but loses the benefit of switching loss reduction at high currents. In this article, a dual-mode operation based on the QSW-MMC is proposed, which actively controls the auxiliary switch to use the submodule capacitor as a clamping component at low currents and as a snubber component at high currents. In addition, the presented control strategy can achieve smooth transitions between two modes. Finally, simulation and experimental results from a scaled test rig validate the efficiency improvement achieved by the proposed dual-mode operation.

Modular Multilevel Converter (MMC) High Voltage Direct Current (HVDC) systems are controlled through a plethora of control loops arranged in a complex hierarchy. Their response to AC-side short-circuit faults will be an interplay of multiple interacting control loops. The control loops must balance compliance to grid codes with impact on system protection, within the limits imposed by the power-electronic components. This paper uses global sensitivity based on elementary effects and Morris screening to identify the most critical parameters in a partially black-boxed MMC control model. Results show that fault current injection parameters and PLL gains have an impact on both internal and AC-side fault behavior, with nonlinear interaction observed between the PLL gain and droop of fault current injection. Results also show that total energy control has a significant impact on AC-side fault behavior and protection performance, which is usually overlooked by the existing literature. The impact of grid strength, pre-fault operation modes, and fault types is studied to generalize the results under different conditions. The application of global sensitivity analysis in MMC-HVDC systems offers transmission system operators a practical tool for identifying critical control parameters without requiring full model access.

The Quasi-Square-Wave (QSW) PWM-modulated Modular Multilevel Converter (MMC) offers the advantages of reduced submodule capacitance and arm inductance, making it a promising technology for variable-speed motor drive applications. This article presents an analytical investigation into the sizing requirements for arm inductors and submodule capacitors in the QSW-PWM-modulated MMC. In addition, an alternative switching sequence is proposed to recover arm inductor energy, effectively eliminating oscillations and ripple current while further reducing voltage variation. The proposed control strategy simplifies hardware requirements by limiting control to steady-state voltage regulation, reducing reliance on high-frequency current control. Simulations and experiments conducted on a scaled test rig validate the proposed switching sequence, and verify the reduced capacitor voltage variation achieved through the proposed control strategy.

This paper reports the design method, physical realisation, and experimental validation of a miniature current sensor for use on SiC power module terminals where there is too little space for commercial Rogowski coils, or where their insertion would compromise busbar performance. Current sensing is carried out by inserting a thin, low-inductance copper spacer, between the module terminal and the busbar, in which a mm-scale notch is cut, to house two coplanar anti-series-connected sense coils. The notch shapes the magnetic field to achieve the desired frequency response of the sensor. The design method uses 3D and 2D finite element simulation to model frequency-dependant skin and proximity effects, to optimize the notch location and dimensions, and the coil location in the notch, thereby achieving a flat bandwidth and high gain. The sensor is experimentally validated against a commercial Rogowski coil in double pulse tests at 1200 V and 300 A, albeit with modifications to insert both sensors. Experimental results are also shown to validate the simulations that determined notch position, sensor location, and gain. The sensor is shown to have a 200 MHz bandwidth, an insertion inductance less than 50 pH, and a high immunity to switching currents in nearby terminals and conductors. Finally, the current sensor is demonstrated in use on three parallel modules in a one-megawatt (1200 V, 900 A) inverter with laminated busbars that have been optimized for low inductance leaving no room for commercial Rogowski coils, thus enabling the observation of the individual parallel modules’ switching current.

Conventional long-horizon finite-control-set model predictive control (FCS-MPC) for power electronics has two main real-time implementation problems: 1) calculation burden and latency; and 2) high hardware resource requirements on real-time platforms such as FPGA. To solve these problems, machine learning models have been proposed using model predictive control results as offline training data to train an artificial neural network (ANN), which will be implemented in the real-time controller instead of the original model predictive control model. In this way, the ANN reduces the online calculation burden and the hardware resource requirements. In this article, an FPGA-based 1-D convolution neural network (CNN) for long-horizon FCS-MPC is proposed. To simplify the network model and reduce the hardware resources further, model compression techniques of pruning, fine-tuning, and quantization are implemented. The proposed model is verified using a parallel hybrid converter as a case study converter, with performance and hardware resource requirements compared to conventional FCS-MPC and multilayer perceptron (MLP) models. The results show that the proposed compressed CNN model can reduce FPGA DSP resource requirements by 75% compared to a FCS-MPC model and an MLP models, while also achieving comparable or superior performance.

The growing reliance on power‐electronic‐based renewable energy and high‐voltage direct current (HVDC) systems poses challenges for distance protection, as converter fault responses differ from those of synchronous generators. At the same time, grid codes require converters to inject reactive current during AC faults, yet these requirements are typically studied independently of protection considerations. This paper addresses the gap by selecting control parameters in modular multilevel converter‐based HVDC systems to enhance distance protection performance while ensuring compliance with grid codes and system stability under varying grid conditions. A global sensitivity analysis is conducted to identify the most influential control parameters, which are then systematically grouped for selection. The approach is evaluated across different system topologies and short circuit ratios, demonstrating its effectiveness in enhancing control‐protection coordination and identifying the conditions where parameter tuning remains inadequate. These findings provide insights into the limitations of parameter tuning and identify scenarios where fundamental changes in control and protection may be required.

Modular multilevel converters (MMC) with fault control capability, such as full-bridge and hybrid MMC, can maintain the operation of DC system by actively limiting the fault current. However, converters with these capabilities present complex fault characteristics, complicating the DC protection design. Although fault features can be analyzed by simulations, short-circuit current calculations are desirable as they give analytical expressions, which simplify the analysis of factors affecting the fault response and are suitable for large-scale applications. However, calculations become challenging when MMC arm voltage reaches the limitation sum sub-module capacitor voltage, a condition known as converter saturation, which is hard to represent with transfer functions. To clarify the fault characteristics during converter saturation, a DC fault current calculation method for converters with fault control capability is proposed. The features under fault control are analyzed and divided into different stages. Then the basic analytical equation based on control and fault circuit is deduced and the saturation impact is considered by adopting a short-time numerical calculation. The proposed method is validated in Simulink and a statistical similarity check shows 91% similarity between the proposed model and simulation results, versus 23% similarity when using a transfer function model that does not consider saturation effects.

Silicon Carbide mosfet s offer increased switching speeds, reduced filtering component sizes and lower switching losses when compared to Silicon IGBTs in power converters. However, available module current ratings, increased oscillatory switching behavior, large drain-source voltage overshoots, and high output voltage $dV/dt$ levels are all limiting factors to their adoption in medium to high-power applications. The use of inter-device inductances with switching edge skewing has previously been demonstrated as a method of limiting current imbalances when paralleling modules. This article shows that by precisely controlling the timing skews applied between modules in such arrangements, substantial overshoot, oscillation, and output voltage $dV/dt$ reductions can also be achieved. In addition, if current feedback is included, the module switching order can be varied to facilitate a fixed-skew active current balancing strategy. The mechanisms behind all of these effects are analyzed in detail, focusing on the impact of applied timing skew, and inter-device inductance on the improvements. An experimental investigation validating the current balancing, switching performance improvements, and reduced output voltage $dV/dt$ is also presented using 400 A 1.2 kV half-bridge modules, with up to 4 modules in parallel at a total load current of 1600 A.

The modular multilevel DC–DC transformer (MMDCT) provides a reliable solution to overcome the challenges of conventional dual‐active‐bridge converters in terms of power semiconductors ratings and dv/dt stress on transformer coupling windings. An alternative modulation method, quasi‐square‐wave, was proposed to reduce the cell capacitance of modular multilevel bridges. However the application of quasi‐square‐wave modulation is found to result in underdamped switching transients and losses when resetting energy stored in arm inductance. This paper presents a detailed transient analysis of MMDCT arm insertion based on an equivalent circuit, which contributes to a more accurate component sizing and gives voltage estimation for individual half‐bridge submodules. Additionally, a revised switching sequence is proposed to recover this inductor energy and lower the oscillation‐related losses. Simulated and experimental results from a scaled test rig of MMDCT are implemented and validate the proposed component sizing and switching sequence, indicating that the converter efficiency can be improved under revised switching sequence. Finally, a silicon carbide based, high‐frequency MMDCT is proposed and simulated.

Active gate driving (AGD) is a promising concept for achieving high‐performance power transistor switching. This is particularly crucial for Silicon Carbide (SiC) MOSFETs since their inherently fast switching characteristics give rise to severe overshoots and oscillations which translate into increased levels of electromagnetic interference (EMI) emissions. In this paper, an AGD strategy using a single‐pulse applied during the switching transient is considered for a 1200 V 400 A SiC MOSFET module. The effect of single‐pulse timing, load current, and temperature on the switching performance is analyzed in detail. The radiated EMI reduction benefits are quantified by H‐field and E‐field probes. A conceptual closed‐loop AGD approach is presented and compared to open‐loop operation. For the transistor turn‐off case under full load current of 400 A, experimental results show that it is possible to reduce voltage overshoot by 43.3%, voltage and current oscillations by 69.7% and 52.2% respectively, and EMI by 76.6%, with a trade‐off in the switching energy by a relatively minor increase of 18.2%, compared to the conventional gate driving case. For the turn‐on case, current overshoot was reduced by 32.7%, EMI by 52%, voltage and current oscillations by 54.6% and 52.8%, respectively, with a penalty of 50.9% increase in the switching loss.