Yanhan Zeng

This article presents a high power supply rejection ratio and dual-output CMOS-only voltage reference (VR) for low-power and low-voltage applications, which was manufactured in a standard 0.18- $\mu $ m CMOS process. To reduce the area and improve energy efficiency, two reference voltages are obtained under a single current branch using an active load. By utilizing the significant $\Delta \text {V}_{\text {TH}}$ between native NMOS transistors and standard NMOS transistors, a self-biased current source was designed, achieving a power consumption of 2 nW. A pre-stabilized circuit incorporating a voltage regulator and a leakage-isolated source follower is introduced to achieve near-zero line sensitivity (LS), thereby significantly reducing the dependence of the bias current on supply voltage. Meanwhile, the leakage-isolated source follower ensures independent bias currents between two VRs in this design, resulting in better temperature characteristics. Based on the 5-chip measurement results, the average temperature coefficients of $\text {V}_{\text {REF1}}$ and $\text {V}_{\text {REF2}}$ are 39.45 and 136.48 ppm/°C, respectively, in a temperature range of $- 40~{^{\circ}}$ C to $100~{^{\circ}}$ C without trimming. The LS of $\text {V}_{\text {REF1}}$ and $\text {V}_{\text {REF2}}$ are 0.36%/V and 0.43%/V. The average PSRRs are −55 and −63 dB at 10 Hz, −43 and −38 dB at 100 Hz, and −55 and −70 dB at 1 MHz, respectively.

This paper presents a trimming-less and dual-output CMOS voltage reference for low power applications based on specific active load and body bias technology. A multi-loop active load connected in a nested structure is proposed to reduce power supply sensitivity. Without trimming, two reference voltages are obtained in a single branch. The proposed voltage reference is fabricated in standard 180nm CMOS technology. Measurement results show that, the proposed voltage reference achieves excellent performance. The untrimmed average temperature coefficient of VREF1 and VREF2 are 28.7ppm/∘C and 97.5ppm/∘C in the range from -40∘C to 125∘C. The line sensitivity of VREF1 and VREF2 are 0.051%/V and 0.034%/V from 1 to 1.8V supply. High power supply rejection ratio of -65dB at 1kHz is obtained and power consumption is 64.7nW.