FSFrançois-Xavier Standaert

François-Xavier Standaert

*This is an algorithmically generated author record based on publicly available information.

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Previous Organizations / Institutes

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François-Xavier Standaert has a total of 330 co-authors. Here are the top co-authors by number of shared publications:


Latest Publications

  • Open Access

    From Simple Mathematical Upper Bounds to Tight Tool-based Bounds for the Minimum Number of Active S-boxes in LS-Designs

    by Jules Baudrin, Rachelle Boissier, Mahnoor Naseer, François-Xavier Standaert

    LS-designs, proposed at FSE 2014, are a conceptually simple family of block ciphers, where a bitslice S-box and a linear L-box are independently applied to the state. They are known for enabling efficiently masked implementations against side-channel attacks. In this paper, we consolidate the understanding of their security against linear and differential cryptanalysis. For this purpose, we first show that the structure of LS-designs enables us to derive non-trivial mathematical upper bounds on the minimum number of active S-boxes in their linear and differential trails. These bounds are a convenient addition to existing lower bounds based on the L-box branch number, as they provide a direct indication on the security claims' tightness. We then show how such mathematical bounds can be used in complement with tool-based bounds obtained from SAT solvers. Applied to the (128-bit, non-involutive) cipher Fantomas, this allows us to confirm the tightness of existing results on the number of active S-boxes for up to 16 rounds. We also show that our theoretical upper bound and SAT-based search are applicable to NSA's low-latency cipher ARADI, which uses L-boxes that vary over the rounds. We hope these results can facilitate the design space exploration of new LS-designs, possibly operating on larger states.

  • Open Access

    Formal Verification, Integration and Physical Evaluation of Prime-Field Masking on Silicon

    by Gaëtan Cassiers, Thorben Moos, Amir Moradi, Nicolai Müller, François-Xavier Standaert

    The resistance of provably secure masked circuits to physical attacks depends in part on the underlying algebraic group and recombination function. Masking over finite fields of odd prime order has been demonstrated, both in theory and in practice, to provide increased natural resistance to side-channel and fault attacks. Its instantiation with a simple additive encoding and implementation-friendly prime modulus was suggested to lead to favorable tradeoffs between security and performance in prior works. To most efficiently leverage these advantages, a family of lightweight Tweakable Block Ciphers (TBCs) called Feistel for Prime Masking (FPM) has been introduced by Grassi et al. at Eurocrypt’24, together with a first hardware-oriented instance called small-pSquare. Yet, barriers for the use and further development of prime-field masking continue to exist and include the lack of automated verification tools compatible with arithmetic over Fp, as well as efficient methods for constant-time generation of uniformly distributed randomness over the field. In this work we tackle these barriers and present our findings from formally verifying, securely integrating and physically evaluating higher-order masked implementations of small-pSquare as an exemplary case study. Our integration includes the tape-out of an Application-Specific Integrated Circuit (ASIC) manufactured in 65nm technology and a custom Printed Circuit Board (PCB). We demonstrate how to securely verify prime-field masked circuits with existing tools such as SILVER, MATCHI and PROLEAD and certify the glitch+transition robustness of our concrete implementations. Along the way we discover and solve a 0-issue originating from incomplete modulo reductions which is present in public source codes of masked prime-field ciphers but has never been discussed. We also introduce Privium, a Bivium-inspired primitive, to efficiently produce random values uniformly distributed over Fp without the need for rejection sampling. We then describe our efficient serialized pipelined small-pSquare architecture enabling an attractive tradeoff between area and latency and compare its pre- and post-layout implementation figures. Finally, we experimentally demonstrate the strong leakage resistance of our formally verified circuits on real silicon.

  • Simulatable Leakage, Revisited

    by Emilie Deprez, Charles Momin, François-Xavier Standaert

  • Open Access

    In Mid-Stream: Removing the FO-Transform Helps against Leakage but is not Enough

    by Duyên Pay, Thomas Peters, François-Xavier Standaert

    The Fujisaki-Okamoto transform is a popular solution to design post-quantum public key encryption schemes, or key encapsulation mechanisms. In order to ensure security against chosen-ciphertext attacks, it checks the validity of ciphertexts by re-encrypting decrypted messages. This operation in turn leads to severe side-channel weaknesses, because the re-encrypted messages can be made key-dependent. Hence, distinguishing them thanks to leakage is sufficient to extract (long-term) secret key information. As a result, recent works suggested to ensure the validity of ciphertexts by other means than re-encryption. For now, the main candidate for this purpose, integrated in the Polka encryption scheme (PKC 2023) and analyzed more generically by Hövelmanns et al. (EUROCRYPT 2025), is to use continuous norm checks through the decryption process. In this paper, we evaluate the extent to which replacing the FO-transform by such norm checks helps resistance against leakage. Negatively, we exhibit new attack vectors that were not anticipated in previous (heuristic) analyzes. Positively, we observe that the removal of the FO-transform nevertheless reduces the attack surface and we identify possible tracks to further minimize it. Overall, our results therefore shed light on the challenge of designing post-quantum public-key encryption schemes, or key encapsulation mechanisms, that can be efficiently protected against side-channel attacks. We hope they can inform theory about leakage sources that could be better taken over by design, to develop new schemes allowing a scarcer use of implementation-level countermeasures.

  • Learning with Errors with Output Dependencies: LWE, LWR, and Physical Learning Problems Under the Same Umbrella

    by Clément Hoffmann, Pierrick Méaux, Mélissa Rossi, François-Xavier Standaert

  • Open Access

    Fly Away: Lifting Fault Security through Canaries and the Uniform Random Fault Model

    by Gaëtan Cassiers, Siemen Dhooghe, Thorben Moos, Sayandeep Saha, François-Xavier Standaert

    Cryptographic implementations are vulnerable to active physical attacks where adversaries inject faults to extract sensitive information. Existing fault models, such as the threshold and random fault models, assume limitations on the amount or probability of injecting faults. Such models, however, insufficiently address the case of practical fault injection methods capable of faulting a large proportion of the wires in a circuit with high probability. Prior works have shown that this insufficiency can lead to concrete key recovery attacks against implementations proven secure in these models. We address this blind spot by introducing the uniform random fault model, which relaxes assumptions on the amount/probability of faults and instead assumes a uniform probabilistic faulting of all wires in a circuit or region. We then show that security in this new model can be reduced to security in the random fault model by inserting canaries in the circuit to ensure secret-independent fault detection. We prove that combining canaries with a more classical fault countermeasure such as redundancy can lead to exponential fault security in the uniform random fault model at a polynomial cost in circuit size in the security parameter. Finally, we discuss the interactions between our work and the practical engineering challenges of fault security, shedding light on how the combination of state-of-the-art countermeasures may protect against injections of many high probability faults, while opening a path to methodologies that formally analyze the guarantees provided by such countermeasures.

  • Open Access

    mid-pSquare: Leveraging the Strong Side-Channel Security of Prime-Field Masking in Software

    by Brieuc Balon, Lorenzo Grassi, Pierrick Méaux, Thorben Moos, François-Xavier Standaert, Matthias Johann Steiner

    Efficiently protecting embedded software implementations of standard symmetric cryptographic primitives against side-channel attacks has been shown to be a considerable challenge in practice. This is, in part, due to the most natural countermeasure for such ciphers, namely Boolean masking, not amplifying security well in the absence of sufficient physical noise in the measurements. So-called primefield masking has been demonstrated to provide improved theoretical guarantees in this context, and the Feistel for Prime Masking (FPM) family of Tweakable Block Ciphers (TBCs) has been recently introduced by Grassi et al. (Eurocrypt’24) to efficiently leverage these advantages. However, it was so far only instantiated for and empirically evaluated in a hardware implementation context, by using a small (7-bit) prime modulus.In this paper, we build on the theoretical incentive to increase the prime field size to obtain improved side-channel (Faust et al., Eurocrypt’24) and fault (Moos et al., CHES’24) resistance, as well as on the practical incentive to instantiate an FPM instance with optimized performance on 32-bit software platforms. We introduce mid-pSquare for this purpose, a lightweight TBC operating over a 31-bit Mersenne prime field. We first provide an in-depth black-box security analysis with a particular focus on algebraic attacks – which, contrary to the cryptanalysis of instances over smaller primes, are more powerful than statistical ones in our setting. We also design a strong tweak schedule to account for potential related-tweak algebraic attacks which, so far, are almost unknown in the literature. We then demonstrate that mid-pSquare implementations deliver very competitive performance results on the target platform compared to analogous binary TBCs regardless of masked or unmasked implementation (we use fix-sliced SKINNY for our comparisons). Finally, we experimentally establish the side-channel security improvements that masked mid-pSquare can lead to, reaching unmatched resistance to profiled horizontal attacks on lightweight 32-bit processors (ARM Cortex-M4).


  • Time-Memory Trade-Offs

    by François-Xavier Standaert, Jean-Jacques Quisquater