Inayat Ali
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Previous Organizations / Institutes
The organizations / institutes from the scholar's other articles in the past ten years
Research Subjects
Inayat Ali has a total of 30 co-authors. Here are the top co-authors by number of shared publications:
- Jeongseok Ha
Korea Advanced Institute of Science and Technology
3 shared publications - Sang-Hyo Kim
Dept. of Electrical and Computer Engineering Sungkyunkwan University Suwon South Korea
3 shared publications - Xiaorong Zhu
College of Telecommunications and Information Engineering, Nanjing University of Posts and Telecommunications, Nanjing 210003, China
2 shared publications - Ali Turab Jafry
Faculty of Mechanical Engineering, Ghulam Ishaq Khan Institute of Engineering Sciences and Technology, Topi 23640, Pakistan
1 shared publication Ayaz Hussain
College of Information and Communication Engineering, Sungkyunkwan University, Suwon, South Korea
1 shared publication- Ayaz Hussain
Department of Electrical and Computer Engineering, Sungkyunkwan University
1 shared publication
Latest Publications
- 24 February 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Communications
- Vol. 73 (9) , 6993-7006
One-Step Ahead Decoding for Symmetric Block-Wise Concatenated BCH Codes
Symmetric block-wise concatenated Bose-Chaudhuri-Hocquenghem (SBC-BCH) codes are known to provide strong error-correcting performance with an iterative hard-decision decoding (IHDD). This work shows that some properties of SBC-BCH codes allow one to readily increase the error-correcting capability of constituent BCH codes by one, i.e., from t to t + 1, which greatly improves the error-rate performance of SBC-BCH codes. To this end, we propose a new decoding algorithm that utilizes structural features of SBC-BCH codes in conjunction with an extension of the Berlekamp-Massey (BM) algorithm, namely the one-step-ahead (OSA) BM algorithm. This combination enables us to reduce the computational complexity and combat the inherent decoding ambiguity associated with the OSA-BM algorithm. Furthermore, we develop an analytical framework to evaluate the average number of candidate codewords returned by the OSA-BM algorithm and derive an upper bound on the probability of ambiguity. Then, we propose a decoding algorithm, called OSA-aided IHDD and conduct extensive performance evaluations and comparisons for error-correcting systems employing SBC-BCH codes with the proposed decoding algorithm. The performance evaluations show that the proposed OSA-aided IHDD considerably improves the error-rate performance in both the waterfall and error-floor regions.
- 24 February 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Communications
- Vol. 73 (9) , 6993-7006
One-Step Ahead Decoding for Symmetric Block-Wise Concatenated BCH Codes
Symmetric block-wise concatenated Bose-Chaudhuri-Hocquenghem (SBC-BCH) codes are known to provide strong error-correcting performance with an iterative hard-decision decoding (IHDD). This work shows that some properties of SBC-BCH codes allow one to readily increase the error-correcting capability of constituent BCH codes by one, i.e., from t to t + 1, which greatly improves the error-rate performance of SBC-BCH codes. To this end, we propose a new decoding algorithm that utilizes structural features of SBC-BCH codes in conjunction with an extension of the Berlekamp-Massey (BM) algorithm, namely the one-step-ahead (OSA) BM algorithm. This combination enables us to reduce the computational complexity and combat the inherent decoding ambiguity associated with the OSA-BM algorithm. Furthermore, we develop an analytical framework to evaluate the average number of candidate codewords returned by the OSA-BM algorithm and derive an upper bound on the probability of ambiguity. Then, we propose a decoding algorithm, called OSA-aided IHDD and conduct extensive performance evaluations and comparisons for error-correcting systems employing SBC-BCH codes with the proposed decoding algorithm. The performance evaluations show that the proposed OSA-aided IHDD considerably improves the error-rate performance in both the waterfall and error-floor regions.
- Open Access
- 27 June 2024
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Quantum Engineering
- Vol. 5, 1-13
Convolutional Neural Decoder for Surface Codes
To perform reliable information processing in quantum computers, quantum error-correction (QEC) codes are essential for the detection and correction of errors in the qubits. Among QEC codes, topological QEC codes are designed to interact between the neighboring qubits, which is a promising property for easing the implementation requirements. In addition, the locality to the qubits provides unusual tolerance to local errors. Recently, various decoding algorithms based on machine learning have been proposed to improve the decoding performance and latency of QEC codes. In this work, we propose a new decoding algorithm for surface codes, i.e., a type of topological codes, by using convolutional neural networks (CNN) tailored for the topological lattice structure of the surface codes. In particular, the proposed algorithm takes advantage of the syndrome pattern which is represented as a part of a rectangular lattice given to the CNN as its input. The remaining part of the rectangular lattice is filled with a carefully selected incoherent value for better logical error-rate performance. In addition, we introduce how to optimize the hyper-parameters in the CNN, according to the lattice structure of a given surface code. This reduces the overall decoding complexity and makes the CNN-based decoder computationally more suitable for implementation. The numerical results show that the proposed decoding algorithm effectively improves the decoding performance in terms of logical error-rate as compared to the existing algorithms, on various quantum error models.
- 27 June 2024
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Quantum Engineering
- Vol. 5, 1-13
Open AccessConvolutional Neural Decoder for Surface Codes
To perform reliable information processing in quantum computers, quantum error-correction (QEC) codes are essential for the detection and correction of errors in the qubits. Among QEC codes, topological QEC codes are designed to interact between the neighboring qubits, which is a promising property for easing the implementation requirements. In addition, the locality to the qubits provides unusual tolerance to local errors. Recently, various decoding algorithms based on machine learning have been proposed to improve the decoding performance and latency of QEC codes. In this work, we propose a new decoding algorithm for surface codes, i.e., a type of topological codes, by using convolutional neural networks (CNN) tailored for the topological lattice structure of the surface codes. In particular, the proposed algorithm takes advantage of the syndrome pattern which is represented as a part of a rectangular lattice given to the CNN as its input. The remaining part of the rectangular lattice is filled with a carefully selected incoherent value for better logical error-rate performance. In addition, we introduce how to optimize the hyper-parameters in the CNN, according to the lattice structure of a given surface code. This reduces the overall decoding complexity and makes the CNN-based decoder computationally more suitable for implementation. The numerical results show that the proposed decoding algorithm effectively improves the decoding performance in terms of logical error-rate as compared to the existing algorithms, on various quantum error models.
- 14 September 2023
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Communications
- Vol. 71 (12) , 6898-6913
Partial Spatial Coupling of LDPC Codes: Reducing the Gap to Capacity by Improving the Rate
A different approach for constructing protograph-based spatially coupled low-density parity-check (SC-LDPC) codes is proposed. Instead of lifting multiple copies of an identical SC-LDPC protograph at the lifting stage of code construction, we divide the copies into fractions α ∈ [0,1] SC-LDPC protographs and β = 1-α uncoupled sequence of block LDPC protographs. The permutations in the edge bundles formed by two different protograph structures follow the multi-edge-type framework. The rate loss associated with SC-LDPC codes is reduced, and we obtain code ensembles with flexible rates, by varying β. We call these codes partial spatially coupled (PSC) LDPC codes, and through density evolution, we show that for data transmission over the binary erasure channel, the gap between channel capacity and thresholds of these codes is smaller as compared to SC-LDPC codes. The main bottleneck in the practical implementation of SC-LDPC codes is the rate loss. Conventionally, the rate loss can be reduced by taking large coupling length L , which however increases the decoding complexity. The proposed PSC-LDPC codes mitigate this tradeoff. Furthermore, these codes can also be decoded by the windowed decoder (WD), and through Monte Carlo simulations, we show that the WD performance of PSC-LDPC codes is better than that of SC-LDPC codes.
- 14 September 2023
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Communications
- Vol. 71 (12) , 6898-6913
Partial Spatial Coupling of LDPC Codes: Reducing the Gap to Capacity by Improving the Rate
A different approach for constructing protograph-based spatially coupled low-density parity-check (SC-LDPC) codes is proposed. Instead of lifting multiple copies of an identical SC-LDPC protograph at the lifting stage of code construction, we divide the copies into fractions α ∈ [0,1] SC-LDPC protographs and β = 1-α uncoupled sequence of block LDPC protographs. The permutations in the edge bundles formed by two different protograph structures follow the multi-edge-type framework. The rate loss associated with SC-LDPC codes is reduced, and we obtain code ensembles with flexible rates, by varying β. We call these codes partial spatially coupled (PSC) LDPC codes, and through density evolution, we show that for data transmission over the binary erasure channel, the gap between channel capacity and thresholds of these codes is smaller as compared to SC-LDPC codes. The main bottleneck in the practical implementation of SC-LDPC codes is the rate loss. Conventionally, the rate loss can be reduced by taking large coupling length L , which however increases the decoding complexity. The proposed PSC-LDPC codes mitigate this tradeoff. Furthermore, these codes can also be decoded by the windowed decoder (WD), and through Monte Carlo simulations, we show that the WD performance of PSC-LDPC codes is better than that of SC-LDPC codes.
- 1 September 2023
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Internet of Things Journal
- Vol. 11 (4) , 6396-6411
Performance Analysis of IOTA Tangle and a New Consensus Algorithm for Smart Grids
Blockchain is an effective technology that enables secure data sharing and trusted energy trading in smart grids (SGs). The consensus algorithm plays a key role in the blockchain’s security and consistency. However, due to nonconcurrency, long consensus time, low throughput, and high transaction fees, current consensus algorithms are not suitable for SGs, where there is a large-scale distributed wireless field area network (FAN) with limited resources and frequent small transactions. In this paper, we propose a performance analysis model and a new consensus algorithm for the tangle in the FAN. First, we propose an analytical analysis model for the consensus time and probability of a successful parasitic chain attack on the FAN by comprehensively considering the number of data transmission hops, communication protocols, computing resources and checked tips. Furthermore, based on the analysis, a new consensus algorithm is proposed by clustering nodes cooperating with each other to complete the proof of work (PoW). Finally, we show the accuracy of the analysis results by comparing them with the simulation results. Additionally, we show that the proposed consensus algorithm can reduce the required consensus time by approximately 50%.
- 1 September 2023
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Internet of Things Journal
- Vol. 11 (4) , 6396-6411
Performance Analysis of IOTA Tangle and a New Consensus Algorithm for Smart Grids
Blockchain is an effective technology that enables secure data sharing and trusted energy trading in smart grids (SGs). The consensus algorithm plays a key role in the blockchain’s security and consistency. However, due to nonconcurrency, long consensus time, low throughput, and high transaction fees, current consensus algorithms are not suitable for SGs, where there is a large-scale distributed wireless field area network (FAN) with limited resources and frequent small transactions. In this paper, we propose a performance analysis model and a new consensus algorithm for the tangle in the FAN. First, we propose an analytical analysis model for the consensus time and probability of a successful parasitic chain attack on the FAN by comprehensively considering the number of data transmission hops, communication protocols, computing resources and checked tips. Furthermore, based on the analysis, a new consensus algorithm is proposed by clustering nodes cooperating with each other to complete the proof of work (PoW). Finally, we show the accuracy of the analysis results by comparing them with the simulation results. Additionally, we show that the proposed consensus algorithm can reduce the required consensus time by approximately 50%.
- Open Access
Framework for the Implementation of Smart Manufacturing Systems: A Case in Point
Smart manufacturing has become a vital technique for increasing productivity and efficiency. Firms are following a smart manufacturing implementation system to compete in the market. Therefore, it is mandatory to find the crucial factors that enable the implementation of intelligent manufacturing in enterprises. This study proposes the framework for a new model factory based on the three-dimensional model that extends the product lifecycle layer. It also analyzes the significant attributes and interdependence relationships of causes and effects through the fuzzy DEMATEL approach for the selected small and medium enterprises discussed as a case study. The results show that the factors in Region 1 are significant attributes that need to be focused on for the development and establishment of small and medium enterprises under consideration. These attributes include design documentation (A11), intelligently management of small and medium enterprises (A3), visualization and monitoring of logistics and production (A6), flow of information, energy, and materials (A12), management platform and data acquisition for equipment (A7), and visualization of quality and process (A5). The sensitivity analysis is also performed to check the results’ validity, reliability, and robustness. This study aids any manufacturing firm in analyzing the critical attributes that contribute to implementing smart manufacturing.
Open AccessFramework for the Implementation of Smart Manufacturing Systems: A Case in Point
Smart manufacturing has become a vital technique for increasing productivity and efficiency. Firms are following a smart manufacturing implementation system to compete in the market. Therefore, it is mandatory to find the crucial factors that enable the implementation of intelligent manufacturing in enterprises. This study proposes the framework for a new model factory based on the three-dimensional model that extends the product lifecycle layer. It also analyzes the significant attributes and interdependence relationships of causes and effects through the fuzzy DEMATEL approach for the selected small and medium enterprises discussed as a case study. The results show that the factors in Region 1 are significant attributes that need to be focused on for the development and establishment of small and medium enterprises under consideration. These attributes include design documentation (A11), intelligently management of small and medium enterprises (A3), visualization and monitoring of logistics and production (A6), flow of information, energy, and materials (A12), management platform and data acquisition for equipment (A7), and visualization of quality and process (A5). The sensitivity analysis is also performed to check the results’ validity, reliability, and robustness. This study aids any manufacturing firm in analyzing the critical attributes that contribute to implementing smart manufacturing.
- 29 July 2022
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Internet of Things Journal
- Vol. 9 (24) , 25643-25659
A Novel Design Method of High Throughput Blockchain for 6G Networks: Performance Analysis and Optimization Model
Sharing is undoubtedly one of the most important features of 6G networks, and blockchain can provide an extended trust-as-a-service (TAAS) distributed sharing solution for 6G networks. However, as a special distributed technology system, blockchain naturally needs to face the “impossible triangle” problem: in the case of ensuring security and decentralization, scalability will inevitably become the Achilles heel of the blockchain system. This article will design a high-throughput blockchain system for 6G networks to achieve trusted sharing and efficient scheduling of network infrastructure, assist future networks in integrating an open Internet architecture, and realize the combination of openness and distributed control. We adopt a shard blockchain design and incorporate digital twins and federated learning; formulate an optimization model for maximizing the throughput of the blockchain network by getting the optimal number of shards, also analyzing other factors affecting the throughput such as service distribution; propose a security performance analysis model for the blockchain network to describe the measures taken against the Byzantine attacks on the network. Analysis and simulation results show that the transaction throughput of the proposed method can reach more than 30 times larger than that of a nonsharding scheme. They also show that when one-third of the nodes in the system are attacked, the consensus of the system is hardly affected; even if the number of nodes being attacked at the same time reaches half of the total number of nodes, the probability of the occurrence of failed shards is still less than $10^{-4}$ , and the system still has good survivability.
- 29 July 2022
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Internet of Things Journal
- Vol. 9 (24) , 25643-25659
A Novel Design Method of High Throughput Blockchain for 6G Networks: Performance Analysis and Optimization Model
Sharing is undoubtedly one of the most important features of 6G networks, and blockchain can provide an extended trust-as-a-service (TAAS) distributed sharing solution for 6G networks. However, as a special distributed technology system, blockchain naturally needs to face the “impossible triangle” problem: in the case of ensuring security and decentralization, scalability will inevitably become the Achilles heel of the blockchain system. This article will design a high-throughput blockchain system for 6G networks to achieve trusted sharing and efficient scheduling of network infrastructure, assist future networks in integrating an open Internet architecture, and realize the combination of openness and distributed control. We adopt a shard blockchain design and incorporate digital twins and federated learning; formulate an optimization model for maximizing the throughput of the blockchain network by getting the optimal number of shards, also analyzing other factors affecting the throughput such as service distribution; propose a security performance analysis model for the blockchain network to describe the measures taken against the Byzantine attacks on the network. Analysis and simulation results show that the transaction throughput of the proposed method can reach more than 30 times larger than that of a nonsharding scheme. They also show that when one-third of the nodes in the system are attacked, the consensus of the system is hardly affected; even if the number of nodes being attacked at the same time reaches half of the total number of nodes, the probability of the occurrence of failed shards is still less than $10^{-4}$ , and the system still has good survivability.
- 30 October 2018
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Wireless Communications Letters
- Vol. 8 (2) , 516-519
Protograph-Based Folded Spatially Coupled LDPC Codes for Burst Erasure Channels
In this letter, protograph-based folded spatially coupled (FSC) LDPC codes are proposed. The new folded-type structure is obtained by folding the spatial coupling chain of a conventional SC LDPC protograph and interlacing the nodes at staggered spatial positions. The proposed codes outperform the SC LDPC codes over single and multiple random-burst erasure channels. We extend the construction of the folded-type structure by connecting multiple one-sided SC LDPC chains for higher resilience to burst erasure channels. The FSC LDPC codes are also compatible with windowed decoder and outperform conventional SC LDPC codes.
- 30 October 2018
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Wireless Communications Letters
- Vol. 8 (2) , 516-519
Protograph-Based Folded Spatially Coupled LDPC Codes for Burst Erasure Channels
In this letter, protograph-based folded spatially coupled (FSC) LDPC codes are proposed. The new folded-type structure is obtained by folding the spatial coupling chain of a conventional SC LDPC protograph and interlacing the nodes at staggered spatial positions. The proposed codes outperform the SC LDPC codes over single and multiple random-burst erasure channels. We extend the construction of the folded-type structure by connecting multiple one-sided SC LDPC chains for higher resilience to burst erasure channels. The FSC LDPC codes are also compatible with windowed decoder and outperform conventional SC LDPC codes.
- Open Access
- 1 January 2018
- Published by Institute of Electronics, Information and Communications Engineers (IEICE) in IEICE Electronics Express
- Vol. 15 (15) , 20180486
Spatially coupled LDPC codes for power line communications with impulsive noise
In this paper, we analyze and propose spatially coupled low-density parity-check (SC LDPC) codes for power line communications (PLC). With windowed-sequential encoding and decoding characteristics of SC LDPC codes, the low latency error correction with superior performance becomes the cornerstone for proposing these codes for PLC systems. The communication channels in PLC have impulsive noise, we use Bernoulli-Gaussian model which has heavy tail distribution for this channel. Through computer simulations, we compare these codes with block LDPC codes and show that SC LDPC codes perform better due to connectivity between coupled blocks.
- 1 January 2018
- Published by Institute of Electronics, Information and Communications Engineers (IEICE) in IEICE Electronics Express
- Vol. 15 (15) , 20180486
Open AccessSpatially coupled LDPC codes for power line communications with impulsive noise
In this paper, we analyze and propose spatially coupled low-density parity-check (SC LDPC) codes for power line communications (PLC). With windowed-sequential encoding and decoding characteristics of SC LDPC codes, the low latency error correction with superior performance becomes the cornerstone for proposing these codes for PLC systems. The communication channels in PLC have impulsive noise, we use Bernoulli-Gaussian model which has heavy tail distribution for this channel. Through computer simulations, we compare these codes with block LDPC codes and show that SC LDPC codes perform better due to connectivity between coupled blocks.
- Open Access
- 9 November 2017
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Access
- Vol. 6, 9336-9346
Improving Windowed Decoding of SC LDPC Codes by Effective Decoding Termination, Message Reuse, and Amplification
In this paper, we address a number of weaknesses of the windowed decoding of spatially coupled low-density parity-check (SC LDPC) codes and propose three modifications that simultaneously improve its performance, complexity, and latency. An effective termination method of the windowed decoding and the reuse of edge messages of previous target symbols provide a good performance-latency tradeoff when compared with the conventional windowed decoder. Also, we propose a scheme that lowers the error floor, in which the amplified edge messages of the previous window are used in the present window. The proposed windowed decoding, consisting of the three schemes, provides a significant performance gain with smaller latency. The validity of the new windowed decoding is verified by the evaluation with codes from different SC LDPC ensembles.
- 9 November 2017
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Access
- Vol. 6, 9336-9346
Open AccessImproving Windowed Decoding of SC LDPC Codes by Effective Decoding Termination, Message Reuse, and Amplification
In this paper, we address a number of weaknesses of the windowed decoding of spatially coupled low-density parity-check (SC LDPC) codes and propose three modifications that simultaneously improve its performance, complexity, and latency. An effective termination method of the windowed decoding and the reuse of edge messages of previous target symbols provide a good performance-latency tradeoff when compared with the conventional windowed decoder. Also, we propose a scheme that lowers the error floor, in which the amplified edge messages of the previous window are used in the present window. The proposed windowed decoding, consisting of the three schemes, provides a significant performance gain with smaller latency. The validity of the new windowed decoding is verified by the evaluation with codes from different SC LDPC ensembles.
- 3 October 2008
- Published by The Electrochemical Society in ECS Transactions
- Vol. 16 (4) , 193-200
PEALD Ru Liner Conformality and Cu Trench Fill Characteristics
Conformality studies on trench structures in oxide and porous low-k dielectrics as well as Cu trench fill evaluations have been conducted employing a plasma enhanced atomic layer deposition (PEALD) Ru liner process in conjunction with conventional physical vapor deposited (PVD) Ta(N). The conformal growth of Ru by PEALD was demonstrated, while the benefits of a Ru layer underneath a conventional PVD Cu seed layer for Cu trench fill enhancement were shown. Poor PVD Cu seed layer coverage is considered to be the prime cause of the poor Cu/liner interface quality observed in the case of conventional Ta(N)/Cu liner/seed processes. Detailed EELS/EDX analysis has confirmed the presence of TaOx at the Ta(N)/Cu interface which is anticipated to be a key contributing factor impacting reliability performance.
- 3 October 2008
- Published by The Electrochemical Society in ECS Transactions
- Vol. 16 (4) , 193-200
PEALD Ru Liner Conformality and Cu Trench Fill Characteristics
Conformality studies on trench structures in oxide and porous low-k dielectrics as well as Cu trench fill evaluations have been conducted employing a plasma enhanced atomic layer deposition (PEALD) Ru liner process in conjunction with conventional physical vapor deposited (PVD) Ta(N). The conformal growth of Ru by PEALD was demonstrated, while the benefits of a Ru layer underneath a conventional PVD Cu seed layer for Cu trench fill enhancement were shown. Poor PVD Cu seed layer coverage is considered to be the prime cause of the poor Cu/liner interface quality observed in the case of conventional Ta(N)/Cu liner/seed processes. Detailed EELS/EDX analysis has confirmed the presence of TaOx at the Ta(N)/Cu interface which is anticipated to be a key contributing factor impacting reliability performance.