Winai Jaikla

This study aimed to develop and evaluate a flipped, microlearning, and augmented reality model to enhance undergraduate engineering students’ conceptual understanding and problem‑solving skills in an electrical circuit laboratory course. The participants consisted of 43 first‑year engi‑ neering students, divided into an experimental group (n = 21) and a control group (n = 22). The experimental group was instructed using the integrated model, while the control group received traditional instruction. Research instruments included a learning achievement test, a problem‑solving skills rubric, and a satisfaction questionnaire, all of which demonstrated acceptable validity and reliability. Data were analyzed using multivariate analysis of variance (MANOVA) and mixed ANOVA. The findings indicated that students in the experimental group significantly outperformed those in the control group in both learning achievement (p < .05) and problem‑solving skills (p < .01). In addition, the experimental group demonstrated greater learn‑ ing retention at two weeks after instruction. These results suggest that integrating augmented reality and microlearning within a flipped classroom framework effectively supports conceptual understanding and enhances problem‑solving skills in engineering education. The integrated model provides a practical instructional approach for improving laboratory‑based learning in science and engineering contexts. This study extends existing research by providing an instruc‑ tional framework that supports both cognitive and experiential learning in higher education.

This paper presents the design of a passive fractional-order element with tunable pseudocapacitance, enabling adaptable circuit behavior without additional power consumption. This is an important feature for modelling and characterization in natural systems, as well as in the field of electrical and electronic engineering, particularly for the design of instrumentation and sensing systems. The proposed topologies are based on integrated unipolar transistor arrays. Two implementations are demonstrated, with fractional orders of 0.22 and 0.5, offering pseudocapacitance adjustment ranges from 65 to 1 670 mikroF/s^0.78 and from 6.7 to 51 mikroF/s^0.5, respectively. Tuning is achieved through a DC bias voltage ranging from 0.8 to 10 V. The devices operate across nearly two decades of frequency, from approximately 100 Hz to 200 kHz, and support signal amplitudes in the hundreds of millivolts. Two application examples highlight their potential: electronic tuning of the center frequency in a fractional-order band-pass filter, and adjustment of the oscillation frequency in a fractional-order oscillator with a fixed 22.5 degrees phase shift between output waves. All concepts and results are experimentally validated in the laboratory.

Phase-Locked Loops (PLLs) are versatile electronic circuits that, among others, are used in various sensor applications (e.g., medical) for their ability to generate stable and precise clock signals. This paper introduces a novel PLL-based frequency demodulation system designed for processing very slow signals, ranging from a few Hz to several hundreds of Hz, with amplitudes in the order of several hundreds of millivolts. The system incorporates specialized analog multipliers tailored for essential PLL components, including the voltage-controlled oscillator, phase detector, loop filter with variable DC offset, and base-band filter, all optimized for the purpose of frequency demodulation. These multipliers were fabricated using the TSMC 0.18 μm, 1.8V CMOS process. The primary design objectives are simplicity, reduced complexity, low power consumption (merely 15 mW), and versatility for applications in sensing engineering. To validate the functionality of the proposed PLL system under practical conditions, we present an example of electrocardiogram signal demodulation, demonstrating its operational performance.

This paper introduces a novel and simple filtering topology for band-reject (notch) and inverse band-reject applications, utilizing two voltage-adjustable operational transconductance amplifiers. The utilization of these active devices enables the implementation of identical topologies for both band-reject and inverse band-reject transfer functions. The resulting responses are harnessed for the cascade synthesis of a specialized comb filter, capable of amplification or attenuating/rejecting specific bands shown on three sub-bands. Both the design of individual sections and the entire cascade have been experimentally verified using active devices manufactured in the TSMC 180 nm CMOS process. Measurements conducted over a range from 10 Hz to 100 kHz demonstrate the importance of the selective filtering, which is significant for various applications, particularly in acoustic, vibration, and magnetic sensing readouts. The example of peaking suppression in magnitude response of emulated environment (acoustic coupling of piezo and microphone) is shown.

Biquad filters are commonly used in analog circuits for various purposes in signal processing and communication applications. We synthesize an analog active biquad filter with five types of voltage‐mode filtering functions. The filter is synthesized using a parallel passive resistor‐inductor‐capacitor (RLC) network and unity‐gain voltage differencing amplifier. A voltage differencing differential input buffered amplifier (VD‐DIBA) is the main active component, and the biquad filter has a three‐input single‐output (TISO) topology. By replacing the passive inductor and resistor with VD‐DIBA‐based inductance and resistance simulators with a subtractor, the TISO voltage‐mode versatile filter is obtained from two VD‐DIBAs, one resistor, and two capacitors connected to the ground. The proposed filter can provide five types of voltage‐mode filtering functions: inverting bandpass and lowpass responses as well as noninverting band‐stop, high‐pass, and all‐pass responses. The all‐pass filter requires no additional active components. The three input voltage nodes have high impedance, and a low‐impedance output voltage node facilitates cascade connections without using additional voltage buffers. In addition, the natural frequency and quality factor can be electronically tuned. The quality factor is controlled without disturbing the passband gain and natural frequency. The proposed filter is simulated and verified experimentally in the Personal Simulation Program with Integrated Circuit Emphasis (PSPICE) and through laboratory tests employing VD‐DIBAs implemented using commercially available components.

MULTIPLE-INPUT SINGLE-OUTPUT VOLTAGE-MODE MULTIFUNCTION FILTER BASED ON VDDDAS

First-order allpass filters are analog filters with a unit magnitude response, but they change the phase shift between input and output signals at various frequencies. This paper presents the transadmittance-mode first-order allpass filters based on the modified current-controlled current differencing transconductance amplifier (M-CCCDTA). The proposed filters utilize a single M-CCCDTA and a grounded capacitor with no external resistors, making them well suited for implementation in an integrated circuit. The gain and phase response of the proposed filters can be adjusted electronically and separately. Also, the high output impedance of the proposed filters at both the input voltage node and the output current node makes cascading easy without the need for buffer devices. A quadrature sinusoidal oscillator based on the proposed first-order allpass filter has been designed as an example of an application. The PSpice simulation and actual experiments are utilized to validate the functionality of the proposed filters. The simulation and experimental results are consistent with the idea of anticipation.