Paul Chang-Po Chao

Outdoor air monitoring for possible air pollution is always one of the important tasks in managing our living environment. A module of five gas sensors and a new learning model is developed by this study to provide precision, real-time multiple gas concentrations in public spaces. The module suits well an Internet of Things (IoT) node of smart gas sensing that integrates a custom-designed sensor array, driving circuits, and wireless transmission via Bluetooth/Wi-Fi. The sensed gas data are uploaded to a cloud platform for remote storage and then retrieved by an edge device for on-site processing. A cascaded multilayer perceptron (MLP) and long short-term memory (LSTM) model, deployed at the edge using TensorFlow Lite for Microcontrollers (TFLM), compensates successfully for sensor cross-sensitivity, temperature and humidity variations, and other environmental interferences, leading to precise multiple-to-multiple gas concentration estimation. This edge AI deployment reduces cloud computation load and makes it possible to an inference in resource-constrained environments. Experimental validation demonstrates that the proposed MLP–LSTM approach achieves accuracies with mean absolute errors (MAEs) within 113 ppb, 0.108 ppm, 0.110 ppm, 0.124 ppm, and 0.13 ppb for NO_x, H₂S, TVOC, CO, and SO₂, respectively, superior to those by traditional analysis methods. The system architecture also shows great capability for future integration into IoT applications and an alert system for environmental air monitoring.

A new mixed-signal circuit chip is presented to detect clock glitches, one of fault injection attackss (FIAs), on cryptographic chips, particularly those deployed in Internet of Things (IoT) devices. In fact, IoT devices in communication often operate under strict cost, power, area constraints and physically accessible environments, making it critical of hardware security and protection against FIA. The key success of the proposed detection lies in a custom-designed delay chain being automatically tuned to approach the remaining operable clock period in the presence of glitches. Successful detection of clock glitches can then be ensured by monitoring continuously whether the clock cycle is shorter than the thresholds defined by the delay chain. The main contribution of this work is the automatic tuning of the delay chain length in an on-line, on-chip fashion to detect glitches even with varied process, voltage, and temperature (PVT) conditions. The on-line adaptivity is made possible by integrating a digital control unit that governs adaptivity and the delay chain, implemented as a mixed-signal circuit capable of effectively detecting malicious clock glitches. The proposed protection circuit was fabricated using the TSMC 180-nm process with an advanced encryption standard (AES) crypto engine serving as a test case to validate the detection capability. Experimental results demonstrate a 100% success rate in detecting glitches at operating frequencies up to 33.3 MHz, with a minimum detectable clock shortening (MDCS) of 0.9 ns caused by clock glitches, showing a state-of-the-art performance as compared to previously reported works.

A fingerprint sensor array of pixels with photo-diodes for sensing and thin film transistors (TFTs) as switches was developed for the first time together with new algorithms to estimate blood pressure (BP) based on quality photoplethysmogram (PPG) sensed from this array device. Towards obtaining PPG in high quality, i.e., low noise, the pixels in the sensor array for under-screen fingerprint sensing in mobile devices are designed capable of being operated in a different mode, connected in parallel to output larger current signals than the original mode of fingerprint sensing, for better SNRs (signal-to-noise ratio) of sensed PPGs. The sensed PPG is next pre-processed with being filtered to remove noise, normalized and re-sampled, etc., followed by a quality check engineered to assess further the sensed PPG in real time by a built deep learning (DL) model, a 1-dimensional convolutional neural network (1D-CNN) with Long Short-Term Memory (LSTM). The model in intended to disqualify the PPGs contaminated by ambient light interference and motion artifacts. Data was collected from 88 subjects, including 52 men and 36 women, by measuring PPG signals from a fingerprint sensor, with systolic blood pressure (SBP) ranging from 90 to 150 mmHg while diastolic blood pressure (DBP) from 50 to 85 mmHg. An OMRON HEM-7127 device was used to obtain reference BPs. In results, an accuracy of 97.13% for distinguishing between qualified and unqualified PPGs has been achieved by the afore-mentioned 1D-CNN trained by ground-truths, pre-collected PPGs judged and labeled into 2 groups, qualified and unqualified PPGs. Next, only the qualified PPGs are fed to another DL model built for estimating BP, in a structure of 1D-CNN with 3 consecutive sections of convolution, batch normalization and max pooling. This BP model is next optimized to a structure and parameters to achieve the best combined estimation of SBP and DBP. The results show accuracy with 1.31 (mean absolute error, MAE) ± 1.34 (standard deviation, SD) for SBP and 4.11 (MAE) ± 3.32 (SD) for DBP, favorable as compared to all the prior arts using an image sensor to estimate BPs.

A hardware accelerator at edge for estimating blood flow volume (BFV) based on photoplethysmography (PPG) from an IoT sensor is successfully designed with on-chip learning for personalization. The success of estimating BFV via PPG helps greatly hemodialysis patients to monitor constantly and ubiquitously the quality of their arteriovenous fistulas or grafts. This accelerator with a BFV estimating algorithm implemented at edge enables faster fine-tuning computation towards favorable accuracy and secure operation without personal biological PPG data transmitted over the fly. The accelerator was built to a chip with a neural network (NN) designed via field programmable gate array (FPGA), consisting mainly of a forward unit for estimating BFV and a backward propagation by an inferencing model. The inferencing is built upon the data collected off-line, and then updated via transfer learning at edge based on additional personal data, i.e., towards personalization of the inference model. In the NN, PPG signal is first filtered through a band-pass filter to remove the noise, while PSD (Power Spectrum Density) and DC (Direct Current) components are extracted as features to predict BFV. The method of cross-domain clock (CDC) with different clock operations in forward and backward propagations is employed in the accelerator to increase computing efficiency. The results show a significant accuracy increase in predicting BFV from 0.932 by the pre-trained model to 0.985 by the personalized model executed in the developed accelerator chip at edge, and superior to all others reported in prior arts.

A next-generation 0.5V based ultra-low voltage and low power (ULV-ULP) readout for long-time continuous monitoring of PPG signals is designed by this effort for flexible hybrid OLED-μLED-OPD patches to detect heart rate (HR) in real-time. The designed readout consists of a transimpedance amplifier, a programmable continuous DC cancellation loop, and an auto-zero-offset cancellation. Towards ULV-ULP, a 0.5V body-driven operational amplifier with multipath miller zero compensation and PPG-Gated pulse density modulation (PDM) to drive OLED are employed as core designs that achieve ultra-low power. Also, this design incorporates a band-pass filter, a delta-sigma modulator, and a comparator. The aforementioned designs are implemented in an IC via the TSMC 0.18 μm process in a chip area of 1.6 mm ² . The sensing range of the readout circuit reaches from 20 nA to 200 μA. The measured integrated noise over 0.1-25 Hz is 0.8 nA _rms , while the achievable dynamic range of the PPG readout is 101.9 dB. The total power consumption of the readout system is as low as only 6 μW, while the power of OLED-μLED ranges from 33μW-3.8mW.

A machine learning-based method predicts the luminance decay of micro light emitting diode (micro-LED) displays, utilizing temperature distribution and degradation experiments alongside implementation on field-programmable gate array (FPGA). Micro-LEDs, used in outdoor and indoor billboards, experience degradation due to harsh environmental conditions. To model temperature distribution in indoor advertising displays using minimal data, a temperature model is constructed based on sensor from the panel and thermal images captured by a camera, in relation to the display pattern. The input data is processed using an FPGA, which transmits the sensed temperatures and display patterns to the micro-LED panel. Multilayer Perceptron (MLP), a type of neural network, predicts the temperature distribution over the panel surface, achieving an error of less than 1.1 °C. Separate degradation models forecast luminance decay, factoring in enclosure temperature, input current, and usage time, with distinct models for red, green, and blue LEDs. Exponential curve-fitting and interpolation, following TM-21 standards, ensure long-term accuracy. The luminance decay predictions have an average error below 1.05% (approximately 9 nits). The FPGA implementation minimizes resource consumption while maintaining prediction accuracy, making it suitable for real-time applications. The degradation model accurately predicts performance over tens or even hundreds of thousands of hours, aligning with the exponential decay trends defined by TM-21.

Sudden Cardiac Arrest (SCA) constitutes a dire medical condition, marked by the abrupt cessation of effective blood circulation due to the heart's failure to contract properly. This leads to acute circulatory collapse, often culminating in loss of consciousness within an hour and potentially resulting in fatality within minutes if left unattended. Heart rate variability (HRV) serves as a critical biometric, derived from electrocardiogram (ECG) signals with ventricular depolarization waves to further calculate the R-R Intervals (RRIs). These intervals provide the basis for extracting various characteristics of cardiac rhythm, encompassing time-domain, frequency-domain, and nonlinear features. This study presents a neural network-based classification algorithm that leverages HRV metrics to categorize patients into SCA and Normal Sinus Rhythm (NSR) cohorts. The proposed neural network (NN) model showcased impressive results, achieving an accuracy of 96.23%, a sensitivity of 94.35%, and a specificity of 98.12% in detecting SCA, as evaluated through leave-one-subject-out analysis. In order to harness the benefits of hardware acceleration, the algorithm is implemented on a Field-Programmable Gate Array (FPGA). Its computational efficiency is subsequently benchmarked against traditional software-based methodologies. The hardware-level implementation is made possible in Verilog hardware description language (HDL) and was verified successfully with expected performance by register-transfer level (RTL) simulation via Vivado 2020.2.

A low-power and low-noise photoplethysmography (PPG) readout for a flexible circular organic light emitting diode (OLED)- organic photodiode (OPD) patch to estimate blood pressure (BP) is designed by this effort. The designed system consists of a current-to-voltage converter, a low-pass filter, a high-pass filter, a programmable gain amplifier (PGA), a window-based external OLED driver, and a micro-controller unit. The front-end circuit of readout is designed to switch automatically between ambient Light and OLEDs to be used as a light source for PPG, that is, to reduce or even switch off the OLED during high contrast light to minimize power consumption. The analog front-end circuit is implemented in the integrated chip with an area of 1.44mm ² and fabricated via the TSMC T18 process. With the standard 1.8V, the experimental result shows that the measured linear current sensing range is 50nA-11μA. The measured signal-to-noise ratio with the OLED-OPD PPG sensing system is over 40 dB (including the sensor). The total power consumption of the designed chip is 54 μW for the readout, while the power consumption of the OLED driver varies from 3.6 μW to 5.3 mW@3.3V.