Chen Chen

Van der Waals (vdW) heterostructures combining two‐dimensional (2D) ferromagnets and semiconducting transition‐metal dichalcogenides (TMDCs) offer highly promising opportunities for tailoring 2D magnetism through interfacial proximity effects, enabling unique physical phenomena inaccessible in 3D systems and achieving functionalities beyond conventional spintronics. However, current fabrication of vdW heterostructures still relies heavily on the manual stacking of exfoliated 2D flakes, leading to critical challenges in scalability, interfacial quality, thickness control and device integration. This work reports on the realization of all‐epitaxial, high‐quality Fe _{5− x} GeTe ₂ (FGT)/WSe ₂ heterostructures exhibiting perpendicular magnetic anisotropy (PMA) and room‐temperature ferromagnetism. The FGT/WSe ₂ system demonstrates temperature‐driven magnetic transitions, higher‐order PMA contributions and large anisotropic magnetoresistance, highlighting sublattice‐specific contributions to magnetic and transport properties. Notably, the FGT/WSe ₂ heterostructures display unconventional physical phenomena, including thickness‐ and temperature‐dependent sign reversal of exchange bias, a reversed thickness trend in the unconventional Hall effect, and a non‐monotonic PMA‐thickness dependence. These anomalies indicate pronounced interfacial contributions arising from proximity effects enhanced by epitaxial interface quality. Collectively, this study provides deep insights into the magnetic and transport properties of FGT/WSe ₂ vdW heterostructures, establishing a scalable platform for exploring emergent 2D physics and developing next‐generation 2D spintronic functionalities.

The combined effects of substrate miscut angle and growth temperature on the epitaxial growth and properties of MoS2 monolayers synthesized by metalorganic chemical vapor deposition (MOCVD) on c-plane sapphire substrates were investigated. Increasing the miscut angle toward the M-axis produces faceted step–terrace surfaces with higher step density and reduced terrace width on the sapphire surface, while promoting pronounced step bunching during growth. These miscut-induced surface reconstructions strongly modulate MoS2 growth, leading to systematic changes in bilayer domain density, size, morphology, and epitaxial alignment without significantly altering the growth rate. Comprehensive structural, optical, and electronic characterizations reveal that growth at 1000 °C on the lowest miscut (0.2°) sapphire yields the highest quality monolayer MoS2, as evidenced by the low full width at half-maximum of the in-plane X-ray diffraction φ-scan peaks, minimized defect-bound exciton emission in photoluminescence spectra at cryogenic temperatures, and superior field-effect transistor performance. In contrast, 1° miscut substrates promote increased bilayer domain density, likely due to increased step bunching of the sapphire, making them suitable for controlled bilayer MoS2 growth. However, further increasing the miscut to 4° or lowering the growth temperature to 950 °C results in significantly degraded structural, optical, and electrical properties. These results highlight the importance of substrate miscut and its role in governing the epitaxial growth of MoS2, offering valuable guidance for the scalable synthesis of high-quality two-dimensional MoS2 films.

Simulated annealing (SA), a metaheuristic algorithm inspired by physical annealing processes, attempts to solve combinatorial optimization problems by performing a stochastic search that iteratively explores the solution space. Probabilistic solution evaluation allows the algorithm to escape local minima and progressively converge toward a global optimum, even within complex solution landscapes. In this work, we present the hardware acceleration of SA for spatial optimization within constrained environments, specifically targeting drone placement that maximizes area coverage while avoiding no-fly zones. Stochasticity is introduced through a true random number generator (TRNG) based on two-dimensional (2D) materials. The system energy is evaluated using a 2D logic circuit and the acceptance of candidate solutions is governed by a programmable 2D circuit with tunable threshold behavior. For a representative drone placement task, our hardware-based annealing accelerator circuit modules consume 43 nJ of energy per iteration and achieve an 1800-fold search acceleration relative to brute-force exploration of the solution space. This work also underscores the potential of 2D-material-enabled stochastic and programmable hardware for real-time constrained optimization.

Contact engineering for two-dimensional (2D) field effect transistors (FETs) has advanced rapidly, with near-quantum-limit contact resistances (R_C) now reported for top contacts formed by physical vapor deposition (PVD) techniques. However, top contacts are inherently scaling-unfriendly because they are limited by transfer-length (L_T). As contact length (L_C) shrinks below L_T, current crowding inflates R_C, constraining footprint scaling. Furthermore, this contact geometry is also ill-matched to stacked nanosheet and gate all around (GAA) transistor technology, which demands tier-addressable, minimal-footprint contacts, i.e., edge contacts. Early reports on edge contact to 2D materials involve PVD approaches with minimal control on the contact/2D interface. Here we introduce a scalable, chemistry-defined edge-contact platform based on atomic layer deposition (ALD) of metallic transition-metal chalcogenides, which exploits the intrinsic reactivity contrast between inert 2D basal planes and under-coordinated edges. Using ALD-grown TiS2 as a prototype, we form conformal edge contacts to wafer-scale monolayer MoS2, WS2, MoSe2 and WSe2, as well as to a multi-tier MoS2 nanosheet stack, illustrating natural compatibility with 2D GAA geometries. For TiS2–MoS2 edge contacts we obtain a contact resistance of ~130 kΩ·µm, consistent with a Schottky barrier of ~0.43 eV, and establish wafer-scale reproducibility through statistics on 100 n-type and 100 p-type devices. First-principles quantum-transport calculations both reproduce the measured barriers and identify alternative ALD-compatible metals that approach near-ohmic edge injection, while revealing that mode matching and edge termination are as critical as band alignment. Finally, complementary inverters assembled from MoS2/WSe2 edge-contacted FETs demonstrate functional logic with well-defined gain, noise margins and static power, positioning ALD-engineered edge contacts as a practical route to high-density 2D CMOS and 3D-integrated nanosheet technologies.

Molybdenum disulfide (MoS2), a prominent member of the transition metal dichalcogenide family, stands out for its unique electronic and optical properties. To date, it is not well understood how doping works with distinct epitaxial layers to metal deposition. We investigate the charge doping effects of Bi and Au on MoS2 using Raman spectroscopy and transport measurements with Bi contacts, analyzing how doping influences epilayer growth and the electrical characteristics of coalesced monolayer (1L) and bilayer (2L) MoS2. We observe that coalesced 1L MoS2 provides a surface conducive to homogeneous doping, while regions with 2L MoS2 exhibit almost no signature for doping but improved device performance due to its enhanced carrier density. Specifically, our results show that field-effect transistors with Bi-contacted 2L MoS2 channels offer approximately 5× higher current density, 1.8× lower contact resistance (RC), and 2× greater field-effect mobility compared to 1L channels. However, 1L MoS2 retains a superior on/off current ratio, exceeding 108, while the on/off ratio for 2L MoS2 is approximately 106. The findings shed light on the interplay between epitaxial layers and metal deposition, offering valuable insights into tailoring MoS2 devices to meet the demands of advanced electronic applications for enhanced performance and functionality.

As silicon-based field-effect transistors (FETs) approach their scaling limits, two-dimensional (2D) semiconductors are emerging as strong contenders for next-generation nanoelectronics. A major barrier to their integration, however, is device-to-device variability that undermines circuit reliability. Here, we present a systematic study linking variability in 2D FETs to both material growth and dielectric integration. Using six distinct metal organic chemical vapor deposition (MOCVD) growth conditions, we systematically studied the impact of epitaxy, grain boundary, and bilayer island coverage on electrical uniformity. We further examine four gate dielectrics: HfO2, Al2O3, ZrO2, and AlN, highlighting the role of dielectric-induced interface roughness in exacerbating variability. Our analysis separates long-range variations from micron-scale fluctuations, revealing that MoS2 exhibits substantially lower variability than WSe2, which remains strongly inhomogeneous even at short length scales. Notably, our HfO2-gated MoS2 FETs, featuring ~1 nm equivalent oxide thickness (EOT) achieve a Pelgrom slope of 7.5 mV-µm, approaching the silicon benchmark of 2.8 mV-µm. These devices also deliver an on-state current up to 300 µA/µm, subthreshold swing as low as 73 mV/dec for 35 nm channel lengths, and a record high mobility of 120 cm2/V-s in long-channel devices. These results demonstrate that variability mitigation can be achieved without compromising performance, and to our knowledge, represents the first statistical correlation of device level variability with both material growth parameters and dielectric choice. This work provides essential design and processing guidelines for scalable, high-performance, and reliable 2D electronics.

The growth and characterization of materials using empirical optimization typically requires a significant amount of expert time, experience, and resources. Several complementary characterization methods are routinely performed to determine the quality and properties of a grown sample. Machine learning (ML) can support the conventional approaches by using historical data to guide and provide speed and efficiency to the growth and characterization of materials. Specifically, ML can provide quantitative information from characterization data that is typically obtained from a different modality. In this study, the feasibility of projecting quantitative metrics from microscopy measurements, such as atomic force microscopy (AFM), using data obtained from spectroscopy measurements, like Raman spectroscopy is investigated. Generative models are also trained to generate the full and specific features of the Raman and photoluminescence spectra from each other and the AFM images of the thin‐film MoS ₂ . The results are promising and have provided a foundational guide for the use of ML for the cross‐modal characterization of materials for their accelerated, efficient, and cost‐effective discovery.

Metalorganic chemical vapor deposition (MOCVD) is a promising technique for wafer-scale synthesis of MoS2 monolayers for 2D field-effect transistors (2D-FETs) and related devices. Epitaxial growth of MoS2 on sapphire provides films that are crystallographically well-oriented but typically contain low-angle grain boundaries (e.g., mirror twins), voids, and other defects depending on growth conditions and substrate characteristics. In this study, we investigate microstructure, optical properties, and field-effect characteristics of wafer-scale MoS2 monolayers grown by MOCVD on c-plane sapphire over a narrow window of growth temperatures (900–1000 °C). The density of low-angle grain boundaries in the MoS2 monolayer was found to decrease dramatically from 50% areal coverage for films grown at 900 °C to 5% at 1000 °C. This decrease in low-angle grain boundary density is correlated with an increase in the room-temperature photoluminescence intensity of A excitons and a decrease in the full-width-half maximum (FWHM) of the Raman A1g peak, which are typically indicative of a general reduction in defects in MoS2. However, the best transport properties (e.g., mean field-effect mobility mFE = 17.3 cm2/V s) were obtained in MoS2 monolayers grown at an intermediate temperature of 950 °C. It was found that as the growth temperature increased, small regions bound by high-angle boundaries begin to appear within the monolayer and increase in areal coverage, from ∼2% at 900 °C to ∼5% at 950 °C to ∼10% at 1000 °C. The growth temperature of 950 °C, therefore, provides an intermediate condition where the combined effects of low-angle and high-angle boundaries are minimized. The results of this study provide guidance on MOCVD growth and characterization that can be used to further optimize the performance of MoS2 2D-FETs.