Bas Vermulst

In this paper, a novel all-solid-state impedance-matched Marx generator (IMG) is proposed that offers fast recharge times and, thus, high repetition rates with little impact on the output rise time. The topology consists of an inverted buck converter combined with a Marx generator. The proposed topology is primarily suitable for the generation of pulses with short pulse widths (e.g., $100 \,\mathrm{n}\mathrm{s}\,{\mathrm{to}}\, 500 \,\mathrm{n}\mathrm{s}$) and high repetition rates (e.g., higher than $1 \,\mathrm{k}\mathrm{Hz}$). Previous studies have shown that, for certain applications, such as air purification, shorter pulse rise times result in higher yields. Therefore, the proposed generator is optimized for a short output rise time through accurate stage timing and the utilization of an impedance-matched layout. Finally, a prototype capable of generating $4.65 \,\mathrm{k}\mathrm{V}$, $95 \,\mathrm{A}$ pulses has been realized to validate the proposed topology. Results show that the generator can achieve a $10 \,\mathrm{k}\mathrm{Hz}$ repetition rate when generating $100 \,\mathrm{n}\mathrm{s}$ full-load output pulses with an output voltage rise time of $8.57 \,\mathrm{n}\mathrm{s}$. In addition, two iterations of the proposed IMG have been built to further improve the output rise time and enhance robustness against electromagnetic interference (EMI).

Gallium nitride high-electron mobility transistors (GaN HEMTs) offer ultrafast switching capabilities because of their compact physical structure, resulting in smaller parasitic components and a lower gate charge requirement. This fast switching capability enables the utilization of the GaN transistors in pulsed power generators such as solid-state impedance-matched Marx generator (IMG). In such applications, the faster rise time of the generated high-voltage and high-current pulses enhances the efficiency of plasma generation in the plasma reactor. Additionally, achieving higher switching speeds is possible by utilizing an enhanced gate driver featuring a high driving current capacity and fast rise/fall times; therefore, numerous research studies have explored various gate-driving methodologies and their implementation. In this article, an improved gate-boosting driving method, originally proposed for IGBTs and then optimized for SiC MOSFETs, is proposed and implemented for driving 650-V GaN transistors to reduce their turn-on time as effectively as feasible. In the proposed improved gate driver, the switching performance of the main 650-V GaN transistor has been evaluated in both simulation and experiments under pulse operation with a resistive load of up to 610and107 A. The obtained rise-time results for the proposed gate driver in simulation and experiments are 1.53and1.71 ns, respectively. Furthermore, current rise rates of 69.94 ${\scriptstyle \text {}^{\scriptstyle \mathrm {~ {\mathrm {\text {k}\text {A} }}}}}\hspace {-0.224em}/\hspace {-0.112em}{\scriptstyle \mathrm {~ {\mathrm {\mu \text {s} }}}}$ and 62.58 ${\scriptstyle \text {}^{\scriptstyle \mathrm {~ {\mathrm {\text {k}\text {A} }}}}}\hspace {-0.224em}/\hspace {-0.112em}{\scriptstyle \mathrm {~ {\mathrm {\mu \text {s} }}}}$ are achieved in simulation and experiments. The achieved rise time and current rise rate results demonstrate the applicability of the proposed gate-driving technique to be used in the upcoming iterations of the IMG to generate nanosecond pulses and, as a result, a more efficient plasma yield.

Due to their smaller parasitic components, gallium nitride high-electron-mobility transistors (GaN HEMTs) are faster than their silicon counterparts. Therefore, they are suitable for applications that require ultrafast switching including plasma generation, where the faster rise time of the applied high-voltage and high-current pulses leads to a higher yield. The gate driver circuit and its implementation determine the turn-on process of the GaN transistors. Therefore, this article investigates two different gate drivers based on the LMG1020 gate driver integrated circuit (IC), previously used for silicon and silicon carbide transistors, to reduce the turn-on time of GaN transistors. In the proposed methods, the switching performance of a 650 V transistor has been evaluated in pulsed operation with a resistive load of 610 V and 107 A. The obtained rise time results for the monolithic Si-based and voltage-source gate drivers are 4.23 and 2.92 ns, respectively.

This paper introduces two new single-path and cascaded High-Resolution Digital Pulse Width Modulation (HRDPWM) architectures. The proposed single-path architecture uses fewer FPGA resources to achieve the same resolution as conventional dual-path architectures. Moreover, the generated HRDPWM signal is independent of the Place-And-Route (PAR) algorithm applied by the synthesis tool, as well as temperature and voltage variations. The proposed cascaded architecture can be used to increase the DPWM resolution without raising the system clock frequency or, alternatively, to reduce the FPGA system clock frequency (relaxing timing challenges) without lowering the resolution. Both architectures have been implemented and verified using a mid-range Artix-7 FPGA with both triangular and sawtooth carriers. A time resolution of 39 ps has been achieved for the cascaded HRDPWM architecture with a sawtooth carrier and a system clock of 400 MHz. Additionally, a GaN-based synchronous buck converter is designed and implemented to evaluate the performance of the proposed HRDPWM architectures in a real application. It is demonstrated that both dead time and duty cycle can be modified with high accuracy and resolution and updated twice per switching cycle.

In this paper an advanced modulation strategy is proposed that generates the switch control signals of a power converter while inherently guaranteeing zero-voltage switching (ZVS) operation. The proposed modulator is based on a first-order Δ∑ combined with a hold-off circuit. This hold-off circuit consists of a D-latch and maintains the converter's switching state until ZVS commutation can be achieved while an integrator ensures the correct average output. Furthermore, features are implemented to improve start-up and transient behavior. The operating principle and stability of the proposed modulator is discussed and simulation results are presented. Finally, the proposed modulator is validated on a 2 kW GaN-based synchronous buck converter. Results show that the converter naturally operates under ZVS conditions by continuously varying its switching frequency without having to compute switching times or frequencies. The proposed method is an interesting alternative to pulse-width modulation especially when operating at high switching frequencies or when the switching loss in the power converter is significant.

Accurate calculation of semiconductor losses and temperature is the foundation of any design methodology for a power electronic converter. Computation accuracy and speed play a vital role if a large set of parameters needs to be considered. Averaged loss models often neglect the temperature dependence of transistors, leading to fast, but inaccurate results. In contrast, iterative methods and simulation tools, which can include temperature dependence, take significantly longer to compute, but yield more precise results. This paper presents a best of both worlds approach, by using the harmonic balance method to obtain the steady-state solution for any inverter topology including temperature dependent conduction and switching losses. The proposed method solves for the discrete Fourier series of the device temperature, by expressing the temperature dependence and operating parameters in the frequency domain. The set of equations for each coefficient is solved by a single matrix inversion, resulting in very fast computation for steady-state temperature cycles. The steady-state operation of over one thousand possible inverter designs is calculated within less than one minute, matching iterative simulation in device temperature, conduction and switching losses, at a fraction of the computation time. In addition, the method shows good agreement with temperature measurements of a three-phase silicon-carbide inverter.

This article proposes a compensation method for gain and offset errors in the current sensing of three-phase AC machine drives with three current sensor measurements during exact or close to standstill conditions. Errors are treated sequentially based on the elliptical trajectory method, a mathematical manipulation by demodulating faulted time-varying d, q currents using the machine position. As three current sensors are used, a correction factor through measured neutral current is proposed such that the impact of machine resistance deviation and inverter non-idealities are minimized. The method does not incorporate any additional hardware, making it low-cost and straightforward in its implementation. It is proposed as a tool for initial commissioning before the machine runs. It is robust to rotor position perturbations and does not need a mechanical lock for compensation in standstill conditions. The effectiveness of the suggested approach is shown by analysis, modelling, and experimental findings acquired from a hardware prototype by mimicking the actual use of high-precision mechatronics.

This work presents a closed-form analytic approach to calculate the distortion introduced in resistive current measurements due to thermal properties of shunt resistors. As a shunt’s resistance varies with temperature, the sensed voltage becomes distorted. This non-linear effect depends on the thermal interface, dissipated power and material properties of the shunt resistor. It is presented, how to simplify the non-linear equation of the shunt temperature and calculate the resulting voltage spectrum, without the use of computationally extensive time-to-frequency-domain transforms. The results of the presented method match simulations including the non-linear behaviour, enabling a quick search through a solution space. The method is experimentally verified by use of a linear amplifier with an output distortion of -90 dB at low frequencies. In the experiment, a total harmonic distortion of up to -70 dB is observed in several shunt resistors covering a range of different thermal properties. Based on the presented method, shunt resistors can be chosen according to the minimum distortion required in a given application. Depending on the frequencies of interest, shunt resistors with a high temperature coefficient might still offer sufficient distortion performance.

A new control method for the bidirectional series-resonant converter is presented that optimizes dynamic behavior. The series-resonant converter is a frequently used converter type due to its inherent zero-voltage switching property for switching frequencies above the resonance frequency. However, a method to control the series-resonant converter dynamically while facilitating bidirectional power flow and zero-voltage switching of all switches is not yet presented. This article presents bidirectional charge control, a control method that realizes dynamic, bidirectional operation of the series-resonant converter. It targets a net amount of charge displacement through the controlled port between two consecutive zero-current crossings, by describing all switching events as a function of the charge difference across the resonant capacitor. As a result, bidirectional charge control facilitates ZVS operation of all switches, regardless of the operating conditions, while minimizing the reactive currents through the connected voltage sources. This article describes the theoretical analysis regarding bidirectional charge control as well as an experimental verification, including nonidealities and the corresponding implementation to guarantee the desired control of the series-resonant converter. Bidirectional charge control realizes dynamic, bidirectional operation of the series-resonant converter while guaranteeing zero-voltage switching of all switches.