Hirofumi Akagi

This article presents an advanced method for power-loss breakdown of a high-power bidirectional isolated dual-active-bridge (DAB) dc-to-dc converter using SiC-mosfet/SBD H-bridge modules. This method is so simple and practical as to extract a switching loss from accurately measured overall losses. A test bench designed and built in this article is characterized by cascading the two identical 750-V 100-kW 16-kHz DAB converters equipped with the two identical unity-turns-ratio transformers. The test bench allows power-loss breakdown at buck and boost operation. When a dc-input voltage of 750 V is different from a dc-output voltage of 850 V at 100 kW and 16 kHz, “hybrid” phase-shift control makes the overall power loss lower by 158 W than “pure” phase-shift control.

Recounts the career and contributions on Akira Nabae.

This paper, based on modeling and scaling as well as simulation and experiment, provides a comprehensive discussion on a real-time real-power emulator for a medium-voltage, high-power, high-speed motor drive. A three-phase modular multilevel double-star chopper-cell (DSCC) inverter under test is connected in front-to-front (FTF) with the emulator. The DSCC inverter is the same in circuit configuration as the DSCC rectifier. This emulator is characterized by integrating mechanical dynamics of both motor and load into it. The power-electronic circuit of the emulator consists of a three-phase DSCC rectifier, three ac inductors, and a single two-winding common-mode inductor at the dc side. This paper starts with modeling and scaling of a three-phase 6.6-kV 10.9-MW four-pole 9000-r/min induction motor drive. Then, the authors design, build, and test a three-phase 200-V 10-kW downscaled test bench. Experimental waveforms from the 10-kW test bench, as well as simulated waveforms from the 10.9-MW full-scale and 10-kW downscaled systems, lead to the following conclusion: The emulator can reproduce both electrical and mechanical dynamics of the three-phase 200V, 10-kW, four-pole, 9 000-r/min induction motor coupled with a centrifugal compressor.

This paper presents the performance of a three-phase bidirectional isolated DC-DC converter (3P-BIDC) in wye-wye (Yy), wye-delta (Yd), delta-wye (Dy), and delta-delta (Dd) transformer configurations, using enhanced switching strategy that combines phase-shift modulation and burst-mode switching. A simulation verification using PSCAD is carried out to study the feasibility and compare the efficiency performance of the 3P-BIDC with each transformer configuration, using intermittent switching, which combines the conventional phase-shift modulation (PSM) and burst-mode switching, in the light load condition. The model is tested with continuous switching that employs the conventional PSM from medium to high loads (greater than 0.3 p.u.) and with intermittent switching at light load (less than 0.3 p.u), in different transformer configurations. In all tests, the DC-link voltages are equal to the transformer turns ratio of 1:1. This paper also presents the power loss estimation in continuous and intermittent switching to verify the modelled losses in the 3P-BIDC in the Yy transformer configuration. The 3P-BIDC is modelled by taking into account the effects that on-state voltage drop in the insulated-gate bipolar transistor (IGBTs) and diodes, snubber capacitors, and three-phase transformer copper winding resistances will have on the conduction and switching losses, and copper losses in the 3P-BIDC. The intermitting switching improves the efficiency of the DC-DC converter with Yy, Yd, Dy, and Dd connections in light-load operation. The 3P-BIDC has the best efficiency performance using Yy and Dd transformer configurations for all power transfer conditions in continuous and intermittent switching. Moreover, the highest efficiency of 99.6% is achieved at the light power transfer of 0.29 p.u. in Yy and Dd transformer configurations. However, the theoretical current stress in the 3P-BIDC with a Dd transformer configuration is high. Operation of the converter with Dy transformer configuration is less favorable due to the efficiency achievements of lower than 95%, despite burst-mode switching being applied.

This paper designs, builds, and tests the 850-V 100-kW 16-kHz bidirectional isolated dc-dc converter using the latest 1.2-kV 400-A SiC-MOSFET/SBD H-bridge modules, with focus on efficiency improvement. It proposes intermittent operation with continuous-current mode (CCM), to reduce switching losses in partial loads. Experimental results verify that the conversion efficiency from the dc-input terminals to the dc-output terminals is as high as 99.3% at the rated power of 100 kW, and 99.2% at a partial load of 10 kW. These efficiency numbers are measured and calculated, discarding the auxiliary power losses of 82 W in total, which are produced by the digital controller, gate-drive circuits, and cooling fans. Experimental transient waveforms show that no dc magnetic flux is included in the 100-W 16-kHz transformer at intervals of switchover between the continuous operation and the CCM intermittent operation when power reversal from -100 kW to 100 kW is performed at an interval of 1 ms. Finally, this paper presents an experimental and theoretical discussion on the voltage ripples appearing across the dc capacitor of each bridge, thus leading to an optimal design of the dc capacitor from a practical point of view.

This paper provides an experimental discussion on a real-time real-power emulator that plays an important role in achieving a total test of medium-voltage, high-power, high-speed induction motor drives. The use of the emulator brings cost and time savings to the test. The test bench including the emulator is characterized by connecting two modular multilevel double-star chopper-cell (DSCC) converters connected in a front-to-front way. This paper designs, builds, and tests a 400- ${\rm V}_{\rm dc}$ , 10-kW downscaled test bench. It mainly consists of the following two identical DSCC converters: 1) one DSCC converter is used as an inverter under test; and 2) the other as a real-time real-power high-fidelity emulator. Experimental waveforms confirm that the emulator can reproduce electrical and mechanical operating performance of the three-phase 200-V, 10-kW, four-pole, 9000-r/min induction motor loaded with a centrifugal compressor.

This paper presents two high-voltage direct-current (HVDC) circuit breakers that have the capability of interrupting a short-circuit current within several milliseconds. They consist of a current-limit inductor, a current-control inductor, one or two mechanical switches, and a multilevel converter with phase-shifted-carrier pulsewidth modulation (PWM). The two breakers can commutate an almost zero current from the main branch to the auxiliary branch. This paper proposes an original breaker with low-voltage and high-voltage mechanical switches connected in series, followed by a simplified breaker with a single high-voltage mechanical switch.Finally, this paper includes experimental verification by two slightly-different downscaled breakers rated at 300 Vdc and 150 Adc, as well as confirmation of an actual original breaker by circuit simulation using the "PSCAD/EMTDC" software package.

This paper starts with a historical review of the family of modular multilevel cascade converters, and the topology and terminology of the family. Then, it answers the following question: ‘What motivated the author to apply phase‐shifted‐carrier pulse‐width modulation (PSC PWM) to the family?’ The success in academic research on this application owes to integrating inter‐cluster balancing or inter‐arm balancing control into the middle layer of a hierarchical control system consisting of three layers. This integration makes it easy to expand the PSC PWM to any bridge‐cell or chopper‐cell count per cluster or arm. Finally, this paper ends with future scenarios of a few promising family members and their practical applications, from the personal experience and view of the author. © 2018 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.

This paper presents theoretical and experimental discussions on low-voltage-ride-through operation of a modular multilevel single-delta bridge-cell (SDBC) inverter intended for utility-scale photovoltaic (PV) systems. Modern grid codes require grid-tied inverters to provide dynamic grid support during grid-fault events by injecting reactive current. This paper discusses decoupled positive- and negative-sequence reactive-current control, focusing on asymmetric voltage sags with imbalanced magnitude and phase relationships. The main objective is to present a feedforward control method based on calculation of the zero-sequence current required for achieving power balance during normal and grid-fault conditions. Moreover, this paper demonstrates a practical method that minimizes overcurrent stress in the three inverter clusters by adjusting active power drawn from PV arrays. Experimental results on a three-phase 12.6-kVA system prove that the SDBC inverter is capable of seamlessly operating through asymmetric voltage sags.

This paper provides an analytical and experimental discussion on a power hardware-in-the-loop (P-HIL) test bench for a medium-voltage, high-power, high-speed synchronous motor drives. This test bench consists of two modular multilevel double-star chopper-cell (DSCC) converters connected in front-to-front (FTF) without transformer. An experimental downscaled P-HIL test bench is designed, constructed, and tested to confirm its operating performance. The three-phase 400-Vdc, 10-kW DSCC inverter with eight chopper cells per arm is used as a "real" inverter under test. The other DSCC rectifier is used as a set of a "virtual" three-phase 200-V, 10-kW, 300-Hz, four-pole, 9 000-r/min synchronous motor and a "virtual" high-speed centrifugal compressor with a quadratic torque-to-speed load characteristic.