Mohamad Moner Al Chawa

In this work, we present a compact memristor model for bipolar neuromorphic ReRAM devices. The proposed model focuses on a behavioural high level description of the device, and it reproduces some of the most important characteristics (i.e. conductance, energy dissipation), using the number of pulses as the input variable instead of any electrical. Its functionality is shown by using it to model the behavior of three different ReRAM devices that were fabricated and measured at the CNR-IMM, Agrate Brianza. Considering a train of identical pulses as an input voltage signal consisting of N pulses and where m is the pulse number. The conductance during depression or potentiation can be described.

In this paper, we present a new compact model of threshold switching devices which is suitable for efficient circuit-level simulations. First, a macro model, based on a compact transistor based circuit, was implemented in LTSPICE. Then, a descriptive model was extracted and implemented in MATLAB, which is based on the macro model. This macro model was extended to develop a physical model that describes the processes that occur during the threshold switching. The physical model derived comprises a delay structure with few electrical components adjacent to the second junction. The delay model incorporates an internal state variable, which is crucial to transform the descriptive model into a compact model and to parameterize it in terms of electrical parameters that represent the component’s behavior. Finally, we applied our model by fitting measured $i-v$ data of an OTS device manufactured by Western Digital Research.

Memristors were proposed in the early ’70s of the XXth century by Leon Chua as a new electrical element linking the charge and the flux. Since that first introduction, these devices have positioned themselves to be considered as possibly fundamental for the new generations of electronic devices. It has to be mentioned that actual memristors have only been recognized to exist as physical elements. In this paper, we apply a modeling framework to generate a model describing experimental measurements performed on a ReRAM. We show how to apply the Dynamic Route Map technique in the general case to obtain an approximation to the differential equation that determines the behaviour of the device.

Due to the increased use of memristors and their many applications, the use of emulators has grown in parallel to avoid some of the difficulties presented by real devices, such as variability and reliability. In this paper, we present a memristive emulator designed using a switched capacitor (SC), that is, an analog component/block and a control part or block implemented using stochastic computing (SCo) and therefore fully digital. Our design is thus a mixed signal circuit. Memristor equations are implemented using stochastic computing to generate the control signals necessary to work with the controllable resistor implemented as a switched capacitor.

Memristors were first proposed in 1971 by Leon Chua. These devices are usually regarded as being one of the newest fundamental breakthrough for electronics. Their role in designing new electronic systems is expected to be an important, key-factor. As an example, they already come in many forms: PCA, ReRAM, etc., to mention a few. In any case, since actual memristors have only appeared quite recently, this technology has yet to be mature enough to provide with readily available, off-the-shelf components. This implies that developing and testing new concepts or design architectures based on memristors are performed mainly by the use of numerical simulation. In this paper, we discuss a powerful modeling framework that eases creating and implementing new memristor models, illustrating with some examples of use.

Cellular Nonlinear Networks (CNN) are a concept introduced in 1988 by Leon Chua and Lin Yang as a bio-inspired architecture capable of massively parallel computation. Since then, CNN have been enhanced by incorporating designs that incorporate memristors to profit from their processing and memory capabilities. In addition, Stochastic Computing (SC) can be used to optimize the quantity of required processing elements; thus it provides a lightweight approximate computing framework, quite accurate and effective, however. In this work, we propose utilization of SC in designing and implementing a memristor-based CNN. As a proof of the proposed concept, an example of application is presented. This application combines Matlab and a FPGA in order to create the CNN. The implemented CNN was then used to perform three different real-time applications on a 512 × 512 gray-scale and a 768 × 512 color image: storage of the image, edge detection, and image sharpening. It has to be pointed out that the same CNN was used for the three different tasks, with the sole change of some programmable parameters. Results show an excellent capability with significant accompanying advantages, such as the low number of needed elements further allowing for a low cost FPGA-based system implementation, something confirming the system’s capacity for real time operation.

We present a compact, continuous, and numerically stable version of a tantalum oxide (TaOx) memristor model which can be employed for robust and reliable simulations of large scale memristor based circuits. The original model contains a piecewise differentiable function in the memductance expression and discontinuous step functions in the state equation. Additionally, the original model does not set a proper upper bound for the state variable and may admit blowing up solutions due to an exponential power term, preventing the use of it for numerically reliable simulations. Considering these drawbacks, we modify the original model so as to i) simplify the memductance function while removing its piecewise differentiable nonlinearity, ii) include a proper window function for the ON state dynamics, which is missing in the original model, iii) modify and bound the exponential power term to prevent an uncontrollable blow-up of the solutions, and iv) apply a process called unification, allowing us to remove the step functions inherent in the model, which is a novelty in state-limited memristor models. We validate the accuracy of the proposed model via DC and transient simulations, dynamic route map analysis and a Spice implementation of an anti-series configuration, showing the applicability of the model.

Due to the increased use of memristors, and its many applications, the use of emulators has grown in parallel to avoid some of the difficulties presented by real devices such as variability and reliability. In this paper, we present a memristive emulator designed using a Switched Capacitor (SC), this is, an analog component/ block and a control part or block implemented using stochastic computing (SCo) and therefore fully digital. Our design is thus a mixed signal circuit. Memristor equations are implemented using stochastic computing to generate the control signals necessary to work with the controllable resistor implemented as switched capacitor.