Hao Tian
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Previous Organizations / Institutes
The organizations / institutes from the scholar's other articles in the past ten years
Research Subjects
Hao Tian has a total of 111 co-authors. Here are the top co-authors by number of shared publications:
- Yunwei Li
University of Alberta
27 shared publications - Hua Wu
School of Control and Computer Engineering, North China Electric Power University, Beijing 102206, China
9 shared publications Feng Gao
Key Lab of Power System Intelligent Dispatch and Control, Shandong University, Jinan, China
7 shared publications- Haifeng Wang
Baidu Inc., Beijing, China
7 shared publications Yu Sun
Baidu Inc
7 shared publications- Fanxiu Fang
University of Alberta, Edmonton, AB, Canada
6 shared publications
Latest Publications
- 11 February 2026
- Published by Springer Nature
- p. 314-322
Experimental Analysis and Safety Assessment of Thermal Runaway Behavior in Sodium-Ion Batteries Under Thermal Abuse
- 11 February 2026
- Published by Springer Nature
- p. 314-322
Experimental Analysis and Safety Assessment of Thermal Runaway Behavior in Sodium-Ion Batteries Under Thermal Abuse
- 11 February 2026
- Published by Springer Nature
- p. 351-359
An Energy Storage Converter Control Scheme for Suppression of Voltage Deviations in Weak Systems Suffering Significant Power Fluctuations
- 11 February 2026
- Published by Springer Nature
- p. 351-359
An Energy Storage Converter Control Scheme for Suppression of Voltage Deviations in Weak Systems Suffering Significant Power Fluctuations
- 30 July 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Emerging and Selected Topics in Power Electronics
- Vol. 14 (1) , 112-127
An Improved Steady-State Analysis Model for Nine-Arm Modular Multilevel Converter With Higher Accuracy and Versatility
As a novel high-voltage and high-power multilevel topology with two sets of AC terminals, nine-arm modular multilevel converter (9A-MMC) can effectively reduce system volume, weight, and cost by multiplexing the middle arm. Steady-state analysis for 9A-MMC is crucial to its circuit parameters design, semiconductor devices selection, and operation performance evaluation, however, the existing steady-state analysis model of 9A-MMC is oversimplified and can only realize qualitative analysis. This paper proposes an improved steady-state analysis model by adopting more accurate modulation references and considering circulating current components in arm currents. Firstly, the fundamental circuit equations are established according to Kirchhoff’s laws of voltage and current. Then, the mathematical relationships among internal electrical parameters are derived from the internal circular interaction path. Next, according to the dynamic power equilibrium relationships, a set of equilibrium equations is constituted to solve the unknown variables in modulation references and arm currents, followed by all electrical parameters being obtained accurately. Finally, the feasibility and accuracy of the proposed analysis model are verified by both simulation and experimental results.
- 30 July 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Emerging and Selected Topics in Power Electronics
- Vol. 14 (1) , 112-127
An Improved Steady-State Analysis Model for Nine-Arm Modular Multilevel Converter With Higher Accuracy and Versatility
As a novel high-voltage and high-power multilevel topology with two sets of AC terminals, nine-arm modular multilevel converter (9A-MMC) can effectively reduce system volume, weight, and cost by multiplexing the middle arm. Steady-state analysis for 9A-MMC is crucial to its circuit parameters design, semiconductor devices selection, and operation performance evaluation, however, the existing steady-state analysis model of 9A-MMC is oversimplified and can only realize qualitative analysis. This paper proposes an improved steady-state analysis model by adopting more accurate modulation references and considering circulating current components in arm currents. Firstly, the fundamental circuit equations are established according to Kirchhoff’s laws of voltage and current. Then, the mathematical relationships among internal electrical parameters are derived from the internal circular interaction path. Next, according to the dynamic power equilibrium relationships, a set of equilibrium equations is constituted to solve the unknown variables in modulation references and arm currents, followed by all electrical parameters being obtained accurately. Finally, the feasibility and accuracy of the proposed analysis model are verified by both simulation and experimental results.
- 23 June 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Emerging and Selected Topics in Power Electronics
- Vol. 13 (6) , 7009-7022
A Modular Multilevel Series/Parallel Converter With Ability of Parallelization Across Submodules
Recently, modular multilevel series/parallel converters (MMSPCs) have witnessed an upward trend, where the submodules (SMs) are allowed to be connected not only in series but also in parallel. The parallel operation of SMs offers significant advantages, including sensorless capacitor voltage balancing, arm current sharing, SM capacitance reduction, and system efficiency improvement. However, in the conventional MMSPC, parallel connection is typically limited to adjacent SMs. To achieve higher voltage and more output levels of MMSPC with a limited number of SMs, the SM capacitor voltages need to be configured differently, similar to those in an asymmetric cascaded H-bridge converter. This configuration means that parallel connection is not allowed between adjacent SMs, but across one or more SMs. Therefore, this paper proposes a novel MMSPC with the ability of parallelization across SMs, allowing each SM to be designedly connected in parallel with any other SM. Besides, the tailored modulation strategy is developed to arrange the connection sequence and state among SMs, which is crucial to the normal operation of the proposed MMSPC. Finally, the simulation and experimental results demonstrate the feasibility and effectiveness of the proposed MMSPC with the ability of parallelization across SMs.
- 23 June 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Emerging and Selected Topics in Power Electronics
- Vol. 13 (6) , 7009-7022
A Modular Multilevel Series/Parallel Converter With Ability of Parallelization Across Submodules
Recently, modular multilevel series/parallel converters (MMSPCs) have witnessed an upward trend, where the submodules (SMs) are allowed to be connected not only in series but also in parallel. The parallel operation of SMs offers significant advantages, including sensorless capacitor voltage balancing, arm current sharing, SM capacitance reduction, and system efficiency improvement. However, in the conventional MMSPC, parallel connection is typically limited to adjacent SMs. To achieve higher voltage and more output levels of MMSPC with a limited number of SMs, the SM capacitor voltages need to be configured differently, similar to those in an asymmetric cascaded H-bridge converter. This configuration means that parallel connection is not allowed between adjacent SMs, but across one or more SMs. Therefore, this paper proposes a novel MMSPC with the ability of parallelization across SMs, allowing each SM to be designedly connected in parallel with any other SM. Besides, the tailored modulation strategy is developed to arrange the connection sequence and state among SMs, which is crucial to the normal operation of the proposed MMSPC. Finally, the simulation and experimental results demonstrate the feasibility and effectiveness of the proposed MMSPC with the ability of parallelization across SMs.
- 6 May 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Industrial Electronics
- Vol. 72 (11) , 11416-11422
Partial Power Processing Converter Design With 99% Energy Utilization Efficiency for Sodium-Ion Batteries
The wide output voltage range (e.g., 1.5–3.95 V) of sodium-ion batteries presents a challenge for converter design in terms of efficiency. This article proposes to use dual-active-bridge (DAB) based partial power processing (PPP) converter to help address voltage conversion and designed the key parameters to enhance the efficiency from perspective of a whole charging and discharging cycle. This research reveals that energy utilization efficiency of such system is a function of transformer’s turn-ratio, and boosting threshold voltage. Optimizations are made to these two factors to enhance energy utilization efficiency. This approach effectively narrows the output voltage range of sodium-ion batteries to a level comparable to that of lithium-ion batteries without inducing significant power losses. Through optimized parameter design, the proposed method achieves an energy utilization efficiency of up to 99.03%.
- 6 May 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Industrial Electronics
- Vol. 72 (11) , 11416-11422
Partial Power Processing Converter Design With 99% Energy Utilization Efficiency for Sodium-Ion Batteries
The wide output voltage range (e.g., 1.5–3.95 V) of sodium-ion batteries presents a challenge for converter design in terms of efficiency. This article proposes to use dual-active-bridge (DAB) based partial power processing (PPP) converter to help address voltage conversion and designed the key parameters to enhance the efficiency from perspective of a whole charging and discharging cycle. This research reveals that energy utilization efficiency of such system is a function of transformer’s turn-ratio, and boosting threshold voltage. Optimizations are made to these two factors to enhance energy utilization efficiency. This approach effectively narrows the output voltage range of sodium-ion batteries to a level comparable to that of lithium-ion batteries without inducing significant power losses. Through optimized parameter design, the proposed method achieves an energy utilization efficiency of up to 99.03%.
- Open Access
- 20 December 2024
- Published by Frontiers Media SA in Frontiers in Electronics
- Vol. 5, 1490939
Machine learning-based spatiotemporal fusion method for non-intrusive charging pile fault identification
Fault detection in charging piles is crucial for the widespread adoption of electric vehicles and the reliability of charging infrastructure. Currently, due to the lack of sufficient fault data for charging piles, achieving stable and accurate fault identification is challenging. Moreover, distinctive fault features are key to accurate fault recognition. To address this, we designed a simulated charging pile system and collected fault data at multiple power levels by manually introducing faults. Furthermore, we proposed a fault identification algorithm based on spatiotemporal feature fusion using machine learning. This algorithm first collects fault data through a sliding window and utilizes Fourier transform to extract frequency domain information to construct temporal features. These features are then fused with spatial current amplitude information to form a distinctive feature set, enabling fault identification based on a machine learning model. Extensive experiments conducted on the constructed dataset show that this method can accurately identify charging pile faults. Compared with random forest and gradient boosted decision tree, the proposed method improves the macro-average score by 2.99% and 7.28%, respectively. We also explored the importance of each feature for fault identification results and the impact of window length on identification outcomes, demonstrating the necessity of the extracted features and the robustness of the proposed method to data resolution.
- 20 December 2024
- Published by Frontiers Media SA in Frontiers in Electronics
- Vol. 5, 1490939
Open AccessMachine learning-based spatiotemporal fusion method for non-intrusive charging pile fault identification
Fault detection in charging piles is crucial for the widespread adoption of electric vehicles and the reliability of charging infrastructure. Currently, due to the lack of sufficient fault data for charging piles, achieving stable and accurate fault identification is challenging. Moreover, distinctive fault features are key to accurate fault recognition. To address this, we designed a simulated charging pile system and collected fault data at multiple power levels by manually introducing faults. Furthermore, we proposed a fault identification algorithm based on spatiotemporal feature fusion using machine learning. This algorithm first collects fault data through a sliding window and utilizes Fourier transform to extract frequency domain information to construct temporal features. These features are then fused with spatial current amplitude information to form a distinctive feature set, enabling fault identification based on a machine learning model. Extensive experiments conducted on the constructed dataset show that this method can accurately identify charging pile faults. Compared with random forest and gradient boosted decision tree, the proposed method improves the macro-average score by 2.99% and 7.28%, respectively. We also explored the importance of each feature for fault identification results and the impact of window length on identification outcomes, demonstrating the necessity of the extracted features and the robustness of the proposed method to data resolution.
- 25 December 2023
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Transportation Electrification
- Vol. 10 (3) , 6195-6209
Triple-Reference-Signal Pulsewidth Modulation Methods for Four-Level Hybrid-Clamped Converter
Four-level hybrid clamped (4L-HC) converter is a promising topology for medium-voltage and high-power applications. By viewing the 4L-HC converter as a two-level converter unit and two three-level converter unit, this article provides a new and intuitive pathway to solve the capacitor voltage imbalance issue of it. It is a triple-reference-signal pulse width modulation method which can be decoupled into three parts: (1) a variable-reference modulation scheme aims at balancing the middle DC-link capacitor voltage; (2) the scheme “Dual-Reference-Signal PWM (DRSPWM) + Zero Sequence Voltage (ZSV) Injection” is introduced to balance the upper and lower capacitor voltages and suppress the low-frequency voltage oscillations on them as well; (3) appropriate redundant switching state selection is used to balance the flying capacitor voltages. Furthermore, different ZSV injection methods of three-level converters can be referred for the 4L-HC converter. Therefore, a second ZSV injection method is adopted to develop a second voltage balancing method for the 4L-HC converter. Finally, the proposed two voltage balancing methods are proved to be effective with simulation and experimental results of the 4L-HC converter under.
- 25 December 2023
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Transportation Electrification
- Vol. 10 (3) , 6195-6209
Triple-Reference-Signal Pulsewidth Modulation Methods for Four-Level Hybrid-Clamped Converter
Four-level hybrid clamped (4L-HC) converter is a promising topology for medium-voltage and high-power applications. By viewing the 4L-HC converter as a two-level converter unit and two three-level converter unit, this article provides a new and intuitive pathway to solve the capacitor voltage imbalance issue of it. It is a triple-reference-signal pulse width modulation method which can be decoupled into three parts: (1) a variable-reference modulation scheme aims at balancing the middle DC-link capacitor voltage; (2) the scheme “Dual-Reference-Signal PWM (DRSPWM) + Zero Sequence Voltage (ZSV) Injection” is introduced to balance the upper and lower capacitor voltages and suppress the low-frequency voltage oscillations on them as well; (3) appropriate redundant switching state selection is used to balance the flying capacitor voltages. Furthermore, different ZSV injection methods of three-level converters can be referred for the 4L-HC converter. Therefore, a second ZSV injection method is adopted to develop a second voltage balancing method for the 4L-HC converter. Finally, the proposed two voltage balancing methods are proved to be effective with simulation and experimental results of the 4L-HC converter under.
- 22 September 2023
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Power Electronics
- Vol. 38 (12) , 15792-15803
An Improved Three-Level Neutral Point Clamped Converter System With Full-Voltage Balancing Capability for Bipolar Low-Voltage DC Grid
Bipolar low voltage dc (LVDC) grids are an emerging and promising solution for power distribution. As a natural candidate for the distribution converter, the three-level neutral point clamped (3L-NPC) converter has inherent but limited capability in balancing the dc voltages during asymmetrical operation. This paper begins by investigating the voltage balancing limits of the conventional 3L-NPC in detail. To overcome the identified limitations, an improved 3L-NPC converter system with a zigzag transformer and a neutral line is proposed. With the designed control strategy, the proposed converter system can provide full bipolar voltage balancing capability without extra devices or penalties on component ratings. The effectiveness and advantages of the proposed scheme are verified by simulation and experimental results.
- 22 September 2023
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Power Electronics
- Vol. 38 (12) , 15792-15803
An Improved Three-Level Neutral Point Clamped Converter System With Full-Voltage Balancing Capability for Bipolar Low-Voltage DC Grid
Bipolar low voltage dc (LVDC) grids are an emerging and promising solution for power distribution. As a natural candidate for the distribution converter, the three-level neutral point clamped (3L-NPC) converter has inherent but limited capability in balancing the dc voltages during asymmetrical operation. This paper begins by investigating the voltage balancing limits of the conventional 3L-NPC in detail. To overcome the identified limitations, an improved 3L-NPC converter system with a zigzag transformer and a neutral line is proposed. With the designed control strategy, the proposed converter system can provide full bipolar voltage balancing capability without extra devices or penalties on component ratings. The effectiveness and advantages of the proposed scheme are verified by simulation and experimental results.
- Open Access
ERNIE 3.0 Tiny: Frustratingly Simple Method to Improve Task-Agnostic Distillation Generalization
Task-agnostic knowledge distillation attempts to address the problem of deploying large pretrained language model in resource-constrained scenarios by compressing a large pretrained model called teacher into a smaller one called student such that the student can be directly finetuned on downstream tasks and retains comparable performance. However, we empirically find that there is a generalization gap between the student and the teacher in existing methods. In this work, we show that we can leverage multi-task learning in task-agnostic distillation to advance the generalization of the resulted student. In particular, we propose Multi-task Infused Task-agnostic Knowledge Distillation (MITKD). We first enhance the teacher by multi-task training it on multiple downstream tasks and then perform distillation to produce the student. Experimental results demonstrate that our method yields a student with much better generalization, significantly outperforms existing baselines, and establishes a new state-of-the-art result on in-domain, out-domain, and low-resource datasets in the setting of task-agnostic distillation. Moreover, our method even exceeds an 8x larger BERT$_{\text{Base}}$ on SQuAD and four GLUE tasks. In addition, by combining ERNIE 3.0, our method achieves state-of-the-art results on 10 Chinese datasets.
Open AccessERNIE 3.0 Tiny: Frustratingly Simple Method to Improve Task-Agnostic Distillation Generalization
Task-agnostic knowledge distillation attempts to address the problem of deploying large pretrained language model in resource-constrained scenarios by compressing a large pretrained model called teacher into a smaller one called student such that the student can be directly finetuned on downstream tasks and retains comparable performance. However, we empirically find that there is a generalization gap between the student and the teacher in existing methods. In this work, we show that we can leverage multi-task learning in task-agnostic distillation to advance the generalization of the resulted student. In particular, we propose Multi-task Infused Task-agnostic Knowledge Distillation (MITKD). We first enhance the teacher by multi-task training it on multiple downstream tasks and then perform distillation to produce the student. Experimental results demonstrate that our method yields a student with much better generalization, significantly outperforms existing baselines, and establishes a new state-of-the-art result on in-domain, out-domain, and low-resource datasets in the setting of task-agnostic distillation. Moreover, our method even exceeds an 8x larger BERT$_{\text{Base}}$ on SQuAD and four GLUE tasks. In addition, by combining ERNIE 3.0, our method achieves state-of-the-art results on 10 Chinese datasets.