Harald Homulle

Accurate and low-noise generation and amplification of microwave signals are required for the manipulation and readout of quantum bits (qubits). A fault-tolerant quantum computer operates at deep cryogenic temperatures (i.e., <; 100mK) and requires thousands of qubits for running practical quantum algorithms. Consequently, CMOS radio-frequency (RF) integrated circuits operating at cryogenic temperatures down to 4 K (Cryo-CMOS) offer a higher level of system integration and scalability for future quantum computers. In this paper, we extensively discuss the role, benefits, and constraints of Cryo-CMOS for qubits control and readout. The main characteristics of the CMOS transistors and their impacts on RF circuit designs are described. Furthermore, opportunities and challenges of low noise RF signal generation and amplification are investigated.

The increasing interest in electronics specifically designed to control quantum processors is currently driven by the quest for large-scale quantum computing. A promising approach is emerging based on the use of CMOS devices operating at deep-cryogenic temperatures, and several essential components have been demonstrated to operate at such temperatures, from basic MOSFETs to field-programmable gate arrays (FPGAs). In this paper, we show, for the first time, a voltage reference in a standard CMOS technology that can guarantee a stable voltage over a wide range of temperatures from 300 K down to deep-cryogenic temperatures. By exploiting CMOS transistors in dynamic-threshold MOS (DTMOS) configuration, the proposed reference occupies only 445 μm2 in a standard 40-nm CMOS process, while showing a temperature coefficient below 0.8 mV/K over the temperature range from 4 K to 300 K. These results demonstrate the feasibility of wide-range cryogenic voltage references to enable future cryogenic applications.

Electronics, from basic sub-micron MOSFETS to large-scale FPGAs, has been shown to operate at deep-cryogenic temperatures. Any digital system relies on an accurate clock for operation. While a clock signal can be provided from room temperature into the cryogenic environment, a clock generated at low temperatures features both smaller system size and tighter integration with the remainder of the electronics. While custom integrated cryogenic oscillator architectures have been proposed, mainly for the generation of radio-frequency signals, no commercial devices have been shown to operate at temperatures as low as 4 K. In this work, we focus on cryogenic frequency generation with commercially available oscillators. Eight commercial crystal and MEMS oscillators, generating 50 or 100 MHz signals, were tested over a wide temperature range from 300 K down to 4 K. Although MEMS devices suffered from apparent ageing effects after several cooling cycles, the majority of crystal oscillators were fully functional even at such low temperatures. The oscillation frequency of crystal-based devices decreased by roughly 0.1%, while power consumption and signal amplitude were slightly higher at cryogenic temperatures. The phase noise and corresponding phase jitter were elevated mainly due to increased flicker noise; the best device shows a phase jitter increase from 350 fs at 300 K to 620 fs at 4 K.

Cryogenic characterization and modeling of two nanometer bulk CMOS technologies (0.16- $\mu \text{m}$ and 40-nm) are presented in this paper. Several devices from both technologies were extensively characterized at temperatures of 4 K and below. Based on a detailed understanding of the device physics at deep-cryogenic temperatures, a compact model based on MOS11 and PSP was developed. In addition to reproducing the device dc characteristics, the accuracy and validity of the compact models are demonstrated by comparing time- and frequency-domain simulations of complex circuits, such as a ring oscillator and a low-noise amplifier, with the measurements at 4 K.

Both CMOS bandgap voltage references and temperature sensors rely on the temperature behavior of either CMOS substrate BJTs or MOS transistors in weak inversion. Bipolar transistors are generally preferred over MOS transistors because of their lower spread. However, at deep-cryogenic temperatures, the performance of BJTs deteriorates due to a significant reduction in current gain and a substantial increase in the base resistance. On the contrary, MOS devices show more stable performance even down to 4 K, but accurate device characterization for the design of such a circuit is currently missing. We present the characterization and analysis over the temperature range from 4 K to 300 K of both substrate bipolar PNP transistors and MOS transistors in standard and dynamic threshold MOS (DTMOS) configurations implemented in a standard 0.16-μm CMOS technology. These results demonstrate that employing MOS or DTMOS enables the operation of bandgap references and temperature sensors in standard CMOS technologies even at deep-cryogenic temperatures.

In this paper, we show how a deep-submicron field-programmable gate array (FPGA) can be operated more stably at extremely low temperatures through special firmware design techniques. Stability at low temperatures is limited through long power supply wires and reduced performance of various printed circuit board components commonly employed at room temperature. Extensive characterization of these components shows that the majority of decoupling capacitor types and voltage regulators are not well behaved at cryogenic temperatures, asking for an ad hoc solution to stabilize the FPGA supply voltage, especially for sensitive applications. Therefore, we have designed a firmware that enforces a constant power consumption, so as to stabilize the supply voltage in the interior of the FPGA. The FPGA is powered with a supply at several meters distance, causing significant resistive voltage drop and thus fluctuations on the local supply voltage. To achieve the stabilization, the variation in digital logic speed, which directly corresponds to changes in supply voltage, is constantly measured and corrected for through a tunable oscillator farm, implemented on the FPGA. The impact of the stabilization technique is demonstrated together with a reconfigurable analog-to-digital converter (ADC), completely implemented in the FPGA fabric and operating at 15 K. The ADC performance can be improved by at most 1.5 bits (effective number of bits) thanks to the more stable supply voltage. The method is versatile and robust, enabling seamless porting to other FPGA families and configurations.

Quantum computers enable a massive speed-up in calculations, thanks to the nature of quantum operations. To unlock quantum computation, a classical system infrastructure is required for the control of qubits and processing of their data. While qubits are generally operating at extremely low temperatures, the implementation of such a control interface is especially challenging for large scale systems, requiring significant physical interconnects between room temperature and the quantum devices. A cryogenic control interface is beneficial due to the closer qubit proximity, reduced thermal heat load, and potentially the integration with qubits at a single temperature. The basis for any such control interface is the error-correction loop, required for a longer coherence time of the qubits. The data processing, in the digital domain, can be completely implemented on an FPGA, operating at cryogenic temperatures. We report on the performance of FPGAs from Altera and Xilinx operating at cryogenic temperatures. A Cyclone V and Artix 7 were implemented on dedicated PCBs and extensive logic characterization was executed to investigate performance changes from room temperature towards 4 Kelvin. According to our extensive and systematic analysis, the Cyclone V is limited in operation down to 30 K, whereas the Artix 7 is fully functional down to 4 K.

A fault-tolerant quantum computer with millions of quantum bits (qubits) requires massive yet very precise control electronics for the manipulation and readout of individual qubits. CMOS operating at cryogenic temperatures down to 4 K (cryo-CMOS) allows for closer system integration, thus promising a scalable solution to enable future quantum computers. In this paper, a cryogenic control system is proposed, along with the required specifications, for the interface of the classical electronics with the quantum processor. To prove the advantages of such a system, the functionality of key circuit blocks is experimentally demonstrated. The characteristic properties of cryo-CMOS are exploited to design a noise-canceling low-noise amplifier for spin-qubit RF-reflectometry readout and a class-F2,3 digitally controlled oscillator required to manipulate the state of qubits.

In this paper we show how a deep-submicron FPGA can be modified to operate at extremely low temperatures through modifications in the supporting hardware and in the firmware programming it. Though FPGAs are not designed to operate at a few Kelvin, it is possible to do so on virtue of the extremely high doping levels found in deep-submicron CMOS technology nodes. First, any PCB component, that does not conform with this requirement, is removed. Both the majority of decoupling capacitor types and voltage regulators are not well behaved at cryogenic temperatures, asking for an ad-hoc solution to stabilize the FPGA supply voltage, especially for sensitive applications. Therefore, we have designed a firmware that enforces a constant power consumption, so as to stabilize the supply voltage in the interior of the FPGA chip. The FPGA is powered with a supply at several meters distance, causing significant IR drop and thus fluctuations on the local supply voltage. To achieve the stabilization, the variation in digital logic speed, which directly corresponds to changes in supply voltage, is constantly measured and corrected for through a tunable oscillator farm, implemented on the FPGA. The method is versatile and robust, enabling seamless porting to other FPGA families and configurations.