Tao Yin

This paper presents an implantable pressure sensor readout system (IPRO) which can work at low voltage and does not need internal low dropout regulator (LDO). This paper has made a series of optimizations for power consumption. The power supply of IPRO uses 434 MHz energy harvesting (EH), which only uses two-stage rectification and is equipped with corresponding ultra-low power undervoltage locking (UVLO) circuit. The analog front-end (AFE) and signal processing parts use current mode and differential pseudo phase locked loop (DPPLL), which can work stably under low voltage and maintain a certain degree of accuracy and power rejection ability. The wireless data transmission part adopts the impulse ultra-wide band (IR-UWB) scheme. Its ultra-low power consumption allows it to be powered by a charge pump, which is the first time it has been proposed in implantable systems. In order to further optimize power consumption, a simplest encoding circuit suitable for the front-end output form was proposed, and a power oscillator (PO) with accelerated start-up was used to optimize area and power consumption. The system is implemented in 180 nm Complementary Metal Oxide Semiconductor (CMOS) process, with a chip area of 1.1 * 1.0 mm ² . The measurement results indicate that the typical working voltage of the IPRO is 0.8 V, the typical power consumption is 11.8 μW, and the accuracy is 1.11 mmHg. Compared with existing designs, there is a significant optimization in supply voltage and power consumption.

Ambient light interference stands as the primary source of noise encountered by the light detection and ranging (LiDAR) systems based on single-photon avalanche diode (SPAD), which seriously restricts the detection range and accuracy of sensors. Multi-event mode and time-gating method are extensively employed due to their effective suppression ability of the ambient light interference with easily implemented circuit structure. However, the current research on these two operational modes is limited to qualitative description, lacking a comprehensive theoretical analysis. This paper investigates the impact of the multi-event mode and time-gating method on enhancing the imaging capabilities of the sensor, employing a probability distribution perspective. A behavioral model is established, enabling the simulation of the comprehensive functionality of a SPAD-based LiDAR system in either first-hit mode or multi-event mode, including the histogramming, coincident detection, time- gating functions. The model can serve as a substitute for the actual circuit in system function validation and parameter optimization, thereby significantly reducing the design and simulation cycle.

Time-to-digital converter (TDC) is currently a key technology in the fields of single-photon avalanche diode (SPAD) time-resolved imaging. TDC has attracted widespread attention due to good resistance to the PVT variations and fine resolution. This paper presents a two-step reconfigurable TDC which is based on gate-vernier rings and self-biased phased-locked loop (SBPLL). The drawback of the Vernier ring oscillator is its long conversion time, So this paper proposes a reconfigurable vernier ring oscillator to meet the requirements of different dead times. The system adopts gating technique to reduce the power consumption. Designed in 180 nm CMOS standard process, the proposed TDC achieves 13.5-ps resolution, 40-ns dynamic range with 85-ns conversion time in the four-stage mode, and 26.9-ps resolution, 30ns conversion time in two-stage mode. The power consumption is 2.4 mW with 1.8 V supply voltage.

This paper presents an output offset minimized capacitance-to-digital interface for a MEMS accelerometer. With a gain-enhanced voltage-controlled oscillator (VCO)-based quantization loop, the interface is able to output a digital signal with improved dynamic range. For optimizing the output offset caused by nonideal factors (e.g., the bond-wire drift), a nested digital chopping feedback loop is embedded in the VCO-based quantization loop. It enables the interface to minimize the output offset without digital filtering and digital-to-analog conversion. The proposed architecture is well suited for dynamic range and offset improvements with low cost. Fabricated with a 0.18 μm Global Foundry (GF) CMOS process, the interface offers a 78 dB dynamic range with 0.4% nonlinearity from a single 2 V supply. With the input referred offset up to 1.3 pF, the offset cancellation loop keeps the DC output offset within 40 mV. The power dissipation is 6.5 mW with a bandwidth of 4 kHz.

Phase error of the demodulation clock in the Coriolis vibratory gyroscope system allows the quadrature errors to leak into the sense channel and causes significant bias and temperature drift at the rate output. A phase self-correction method to suppress the temperature drift of the bias in gyroscopes is proposed. Through sweeping the demodulation clock phase and simultaneously monitoring the mechanical quadrature error output in gyroscopes, the optimal demodulation clock phase with minimum relatively phase shift is determined. Thus the bias influenced by the temperature and surroundings can be calibrated on-chip at start-up or when the environment changes drastically without the requirement of the complicated instruments. The proposed approach is validated by a silicon MEMS gyroscope with the natural frequency of 2.8[Formula: see text]kHz, which shows nearly 22 times improvement in the temperature sensitivity of the system bias, from 550[Formula: see text]mdeg/s/^∘C down to 24.7[Formula: see text]mdeg/s/^∘C.

EEG motor imagery recognition based brain computer interface has been an import scheme to construct an alternative pathway of the brain to the outside world. EEG signal is usually buried in noise and has very low signal to noise ratio (SNR), which has presented great challenge for efficient motor imagery classification. In addition, the large intra-subject and inter-subject signal variance toward one specific motor imagery also brings difficulty for accurate classification. In recent years, some deep learning solutions based on AutoEncoder, Restricted Boltzmann Machine, CNN and RNN have been proposed for EEG motor imagery classification which have well improved the motor imagery classification accuracy. However, the multi-subject and multi-task motor imagery classification problem remains a challenge. The high computational cost of the existing deep learning solutions is another serious issue to be addressed. In this paper, a new motor imagery classification solution based on Temporal Convolutional Network (TCN) is developed. The dilated causal convolution within TCN could well incorporate the temporal information in a parallel way with much higher computational efficiency than the traditional RNNs. Time stacked spatial EEG signal has been employed as the input to the TCN. Based on which, both the spatial distribution information and temporal variation of the brain signal have been considered. Extensive experiments have shown that the proposed TCN solution has obtained state of the art performance on multi-subject and multi-task motor imagery classification. A high classification accuracy as 97.89% on 20 subjects and 5 tasks has been reached.

This paper presents a novel low-voltage bandgap reference with improved power supply rejection (PSR). The proposed circuit adopts a complementary loop locking approach for stabilizing the drain-source voltages of the current mirrors, which gives rise to a boost of the PSR performance by more than 30[ ]dB over [ ]–110^∘C and at 1-V supply. An analysis shows that the PSR of the proposed bandgap reference is typically characterized with its insensitivity to temperature variations. The circuit is designed with a commercial 0.18-[ ]m CMOS process. The experiment results of Monte Carlo simulation demonstrate that the average PSR with 1-V supply is [ ][ ]dB at DC and is [ ][ ]dB at 1[ ]kHz (attained under a room temperature condition of 27^∘C). And the temperature coefficient of the DC-based PSR is about 0.83%/^∘C at 1-V supply, significantly decreased by three–six folds compared to other conventional designs. The quiescent current consumed is only about 13.5[ ][ ]A.

This paper presents a low-power low-noise instrumentation amplifier (IA) for bio-potential recording. The proposed IA is based on a novel Gm-RSC structure, whose gain is determined by the transconductance (Gm) and the equivalent resistance ([Formula: see text]) of the switched-capacitor (SC) load. The transconductance amplifier stage is based on the current-reuse telescope topology to achieve low noise at low-power dissipation. A resistor-controlled oscillator is designed to generate desirable operational frequency for SC load and to continuously tune the mid-band gain of the IA for different biomedical applications. Measurement results show that the input referred noise of the proposed IA is about 1.27[Formula: see text][Formula: see text]V_RMS ([Formula: see text][Formula: see text]Hz) and the noise efficiency factor is 3.3. The range of tunable gain is from 28 to 40[Formula: see text]dB. The common mode rejection ratio and power supply rejection ratio at 50[Formula: see text]Hz are 72 and 78[Formula: see text]dB, respectively. The IA consumes only 660[Formula: see text]nA current at 1.2[Formula: see text]V supply and the active area of the IA is only 0.035[Formula: see text]mm².