Anil Kumar Pandey

In this paper, a unique technical approach is presented to accurately analyze and optimize the address bus of an onboard DDR4 memory module by taking power plane induced noise and thermal effect simultaneously in the analysis. For high-speed digital designers, designing data channel in DDR4 memory is always challenging due to high data rates of 3.2GB/s per data signal at a low-voltage of 1.2V. The design is simulated at 1.6 Gbps that is the highest DDR4 switching rate in a configuration containing four memory devices. It is important to catch SI and PI problems at an early stage in design that requires fast and accurate signal integrity analysis for address bus. To maximize eye opening, address bus interconnects impedance optimization is carried out. DDR4 power plane and address signals are analyzed using PI-SI solver that is based on full-wave electromagnetic simulation, then the transient simulation is performed on combined PI data of power plane and address bus. The coupling of simultaneous switching noise (SSN), power plane jitter and thermal effects on DDR4 address bus signals are accounted in power and thermal-aware signal integrity analysis using PIPro signal integrity solution.

This paper presents a new design concept of a beam steerable high gain phased array antenna based on WR28 waveguide at 29 GHz frequency for fifth generation (5G) full dimension multiple input multiple output (FD-MIMO) system. The 8×8 planar phased array is fed by a three dimensional beamformer to obtain volumetric beam scanning ranging from -60 to +60 degrees both in azimuth and elevation direction. Beamforming network (BFN) is designed using 16 set of 8×8 Butler matrix beamformer to get 64 beam states, which control the horizontal and vertical angle. This is a new concept to design waveguide based high power three-dimensional beamformer for volumetric multibeam in Ka band for 5G application. The maximum gain of phased array is 28.5 dBi that covers 28.9 GHz to 29.4 GHz frequency band.

In this paper, signal and power integrity of complete High Definition Multimedia Interface (HDMI) channel with IBIS-AMI model is presented. Gigahertz serialization and deserialization (SERDES) has become a leading inter-chip and inter-board data transmission technique in high-end computing devices. The IBIS-AMI model is used for circuit simulation of high-speed serial interfaces. A 3D frequency-domain simulator (FEM) was used to estimate the channel loss for data bus and HDMI connector. Compliance testing is performed for HDMI channels to ensure channel parameters are meeting HDMI specifications.

Designing data channels for the DDR4 memory is a challenging due to high data rates of 3.2GB/s per data signal at a low-voltage of 1.2V The coupling of simultaneous switching noise (SSN) in data signals in DDR4 memory modules is a critical signal and power integrity (SI/PI) problem. It is important to catch SI and PI problems at an early stage in design that requires fast and accurate power-aware signal integrity analysis. In this paper, power-aware signal integrity (PI-SI) analysis of data group signals of an onboard DDR4 memory module using power-aware IBIS model is presented. DDR4 power plane and data signals are analyzed using 3D Electromagnetic based PI-SI solver then the transient simulation is performed on combined PI data of power plane and data signals to get simultaneously switching noise (SSN) response of data bus and crosstalk between nearby channels.

In this paper, modeling and simulation of chaff cloud using fullwave electromagnetic solver is presented. Scattering characteristics of chaff using a cloud of strip dipoles has been studied in presence or large target. The influence of mutual coupling between the dipoles is taken into account. Randomly oriented and distributed chaff cloud is generated using automated script. Both monostatic and bistatic RCS of chaff cloud in presence of 41 meter large aircraft is calculated using Finite Difference Time domain (FDTD) solver of EMPro simulation tool. It has been shown that complicated chaff cloud can be modeled and analyzed without any approximations or simplifications, in a relatively reasonable time, using the electromagnetic Finite Difference Time Domain (FDTD) solver.

This paper presents the design of a dual frequency microstrip patch antenna. The design is presented at C and X band with centre frequency at 5.35 and 9.6 GHz respectively. The radiating element at C band is a microstrip patch while the radiating element at X band is a slot. Simulated and measured data are presented as a function of geometrical parameters.