Nadiia Kolomiiets
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Research Subjects
Nadiia Kolomiiets has a total of 28 co-authors. Here are the top co-authors by number of shared publications:
Hanjin Lim
Semiconductor Research Center 4 Samsung Electronics 1, Samsungeonja-ro, Gyeonggi-do 445-701, South Korea
4 shared publicationsJaewan Chang
Semiconductor Research Center 4 Samsung Electronics 1, Samsungeonja-ro, Gyeonggi-do 445-701, South Korea
4 shared publicationsKyuho Cho
Semiconductor Research Center 4 Samsung Electronics 1, Samsungeonja-ro, Gyeonggi-do 445-701, South Korea
4 shared publicationsSteve Knebel
NaMLab gGmbH 1 , Noethnitzer Strasse 64, 01187 Dresden, Germany
4 shared publications- Thomas Mikolajick
NaMLAb gGmbH Dresden Germany
4 shared publications Uwe Schroeder
NaMLab gGmbH 1 , Noethnitzer Strasse 64, 01187 Dresden, Germany
4 shared publications
Latest Publications
- 7 December 2017
- Published by Wiley in Physica Status Solidi (a)
- Vol. 215 (6)
Internal Photoemission Metrology of Inhomogeneous Interface Barriers
Interfaces of heterogeneous solids, ranging from polycrystalline materials to composites, are frequently encountered in nanotechnology. Electron transport in these materials and across their interfaces critically depends on the energy barriers electrons encounter on their way. Because of electrode structural heterogeneity, the barriers may exhibit significant spatial variations resulting in a broad distribution of barrier heights and built‐in potentials. Quantification of the distributed interface barriers represents a formidable experimental challenge since direct association of interface properties with those of an outer free surface is generally inaccurate. Here we present a methodology enabling quantification of electron barriers at interfaces of semiconductors and metals with insulators using the electric field‐dependent internal photo‐emission (IPE) of electrons. It is shown that practically relevant interfaces may contain “patches” with differences in barrier height (or the effective work function) of up to 1 eV, which makes the electrode heterogeneity a crucial factor in designing electron devices suitable for low‐voltage operation.
- 7 December 2017
- Published by Wiley in Physica Status Solidi (a)
- Vol. 215 (6)
Internal Photoemission Metrology of Inhomogeneous Interface Barriers
Interfaces of heterogeneous solids, ranging from polycrystalline materials to composites, are frequently encountered in nanotechnology. Electron transport in these materials and across their interfaces critically depends on the energy barriers electrons encounter on their way. Because of electrode structural heterogeneity, the barriers may exhibit significant spatial variations resulting in a broad distribution of barrier heights and built‐in potentials. Quantification of the distributed interface barriers represents a formidable experimental challenge since direct association of interface properties with those of an outer free surface is generally inaccurate. Here we present a methodology enabling quantification of electron barriers at interfaces of semiconductors and metals with insulators using the electric field‐dependent internal photo‐emission (IPE) of electrons. It is shown that practically relevant interfaces may contain “patches” with differences in barrier height (or the effective work function) of up to 1 eV, which makes the electrode heterogeneity a crucial factor in designing electron devices suitable for low‐voltage operation.
- 1 June 2017
- Published by Elsevier in Microelectronic Engineering
- Vol. 178, 304-307
Metal- and oxide-related hydrogen-induced dipoles at the Pt/HfO2 interface
- 1 June 2017
- Published by Elsevier in Microelectronic Engineering
- Vol. 178, 304-307
Metal- and oxide-related hydrogen-induced dipoles at the Pt/HfO2 interface
- 18 June 2016
- Published by The Electrochemical Society in ECS Journal of Solid State Science and Technology
- Vol. 5 (11) , Q3008-Q3011
Valence Band Profile in Two-Dimensional Silicon-Oxygen Superlattices Probed by Internal Photoemission
Energy distribution of electron states in two-dimensional superlattices (SLs) of crystalline silicon layers separated by monolayers (MLs) of oxygen atoms is studied using internal photoemission (IPE) spectroscopy. SLs made of 1, 2 or 5 periods of one ML of O in between 25, 15, 7, 3 or ∼1 nm thick Si layers were studied by using IPE from these SLs into 20-nm thick Al2O3 dielectric deposited on top of the SL. We observed the reduction of direct optical transition intensity in Si-O SLs when decreasing the Si thickness to 1 nm, indicative of the Si electronic structure distortion inside the SLs. The field dependence of IPE spectral threshold indicates the absence of both the change in Si-O SLs VB energy and any additional field-induced band bending across the SLs. Further, electron spin resonance indicates the absence of additional Si dangling bonds in the Si-O SLs within the sensitivity limit of ≈1011 cm−2. These findings suggest that Si-O SLs enhance the carrier mobility by breaking the crystal symmetry and tuning the location of the channel to the region where electrons or holes travel without additional scattering.
- 18 June 2016
- Published by The Electrochemical Society in ECS Journal of Solid State Science and Technology
- Vol. 5 (11) , Q3008-Q3011
Valence Band Profile in Two-Dimensional Silicon-Oxygen Superlattices Probed by Internal Photoemission
Energy distribution of electron states in two-dimensional superlattices (SLs) of crystalline silicon layers separated by monolayers (MLs) of oxygen atoms is studied using internal photoemission (IPE) spectroscopy. SLs made of 1, 2 or 5 periods of one ML of O in between 25, 15, 7, 3 or ∼1 nm thick Si layers were studied by using IPE from these SLs into 20-nm thick Al2O3 dielectric deposited on top of the SL. We observed the reduction of direct optical transition intensity in Si-O SLs when decreasing the Si thickness to 1 nm, indicative of the Si electronic structure distortion inside the SLs. The field dependence of IPE spectral threshold indicates the absence of both the change in Si-O SLs VB energy and any additional field-induced band bending across the SLs. Further, electron spin resonance indicates the absence of additional Si dangling bonds in the Si-O SLs within the sensitivity limit of ≈1011 cm−2. These findings suggest that Si-O SLs enhance the carrier mobility by breaking the crystal symmetry and tuning the location of the channel to the region where electrons or holes travel without additional scattering.
- 9 February 2016
- Published by AIP Publishing in Journal of Applied Physics
- Vol. 119 (6) , 064101
Low leakage ZrO2 based capacitors for sub 20 nm dynamic random access memory technology nodes
During dynamic random access memory (DRAM) capacitor scaling, a lot of effort was put searching for new material stacks to overcome the scaling limitations of the current material stack, such as leakage and sufficient capacitance. In this study, very promising results for a SrTiO3 based capacitor with a record low capacitance equivalent thickness value of 0.2 nm at target leakage current are presented. Due to the material properties of SrTiO3 films (high vacancy concentration and low band gap), which are leading to an increased leakage current, a physical thickness of at least 8 nm is required at target leakage specifications. However, this physical thickness would not fit into an 18 nm DRAM structure. Therefore, two different new approaches to develop a new ZrO2 based DRAM capacitor stack by changing the inter-layer material from Al2O3 to SrO and the exchange of the top electrode material from TiN to Pt are presented. A combination of these two approaches leads to a capacitance equivalent thickness value of 0.47 nm. Most importantly, the physical thickness of <5 nm for the dielectric stack is in accordance with the target specifications. Detailed evaluation of the leakage current characteristics leads to a capacitor model which allows the prediction of the electrical behavior with thickness scaling.
- 9 February 2016
- Published by AIP Publishing in Journal of Applied Physics
- Vol. 119 (6) , 064101
Low leakage ZrO2 based capacitors for sub 20 nm dynamic random access memory technology nodes
During dynamic random access memory (DRAM) capacitor scaling, a lot of effort was put searching for new material stacks to overcome the scaling limitations of the current material stack, such as leakage and sufficient capacitance. In this study, very promising results for a SrTiO3 based capacitor with a record low capacitance equivalent thickness value of 0.2 nm at target leakage current are presented. Due to the material properties of SrTiO3 films (high vacancy concentration and low band gap), which are leading to an increased leakage current, a physical thickness of at least 8 nm is required at target leakage specifications. However, this physical thickness would not fit into an 18 nm DRAM structure. Therefore, two different new approaches to develop a new ZrO2 based DRAM capacitor stack by changing the inter-layer material from Al2O3 to SrO and the exchange of the top electrode material from TiN to Pt are presented. A combination of these two approaches leads to a capacitance equivalent thickness value of 0.47 nm. Most importantly, the physical thickness of <5 nm for the dielectric stack is in accordance with the target specifications. Detailed evaluation of the leakage current characteristics leads to a capacitor model which allows the prediction of the electrical behavior with thickness scaling.
- 1 January 2016
- Published by Elsevier in Solid-State Electronics
- Vol. 115, 133-139
Conduction barrier offset engineering for DRAM capacitor scaling
- 1 January 2016
- Published by Elsevier in Solid-State Electronics
- Vol. 115, 133-139
Conduction barrier offset engineering for DRAM capacitor scaling
- 28 September 2015
- Published by Wiley in Physica Status Solidi (a)
- Vol. 213 (2) , 260-264
Hydrogen induced dipole at the Pt/oxide interface in MOS devices
Thanks to its good thermal stability, including resistance to oxidation, platinum (Pt) is widely used in prototyping a wide spectrum of electron devices ranging from metal‐oxide‐semiconductor (MOS) transistors to resistive switching memory cells. In this work, the energy barriers for electrons between the Fermi level of Pt and the conduction band of several oxide insulators (SiO2, Al2O3, HfO2, Hf0.8Al0.2Ox, Sr0.53Ti0.47O3) were determined by using internal photoemission of electrons. By combining this barrier value with the electron affinity of the particular oxide, the effective work function (EWF) of Pt was determined for different interfaces. As studied over the reference Pt/oxide/Si stacks de‐gassed in high vacuum at 400 °C, the EWF of Pt is found to differ significantly from the accepted vacuum WF value of 5.6 eV. The EWF is equal to 5.2 eV at the Pt/Al2O3 interface, 5.1 eV at Pt/HfO2, 5.3 eV at Pt/Hf0.8Al0.2Ox, 4.8 eV at Pt/SiO2, and 5.8 eV at the Pt/Sr0.53Ti0.47O3 interface indicating the presence of a polarization layer of which the contribution to the EWF depends on the oxide composition. Furthermore, annealing in H2 at 400 °C reduces the Pt EWF by ∼0.5 eV at all interfaces except for the Pt/Sr0.53Ti0.47O3 one. This observation indicates the formation of an additional H‐related dipole at the Pt/oxide interfaces and suggests that the vacuum WF of Pt cannot be used as the value relevant for the MOS properties.
- 28 September 2015
- Published by Wiley in Physica Status Solidi (a)
- Vol. 213 (2) , 260-264
Hydrogen induced dipole at the Pt/oxide interface in MOS devices
Thanks to its good thermal stability, including resistance to oxidation, platinum (Pt) is widely used in prototyping a wide spectrum of electron devices ranging from metal‐oxide‐semiconductor (MOS) transistors to resistive switching memory cells. In this work, the energy barriers for electrons between the Fermi level of Pt and the conduction band of several oxide insulators (SiO2, Al2O3, HfO2, Hf0.8Al0.2Ox, Sr0.53Ti0.47O3) were determined by using internal photoemission of electrons. By combining this barrier value with the electron affinity of the particular oxide, the effective work function (EWF) of Pt was determined for different interfaces. As studied over the reference Pt/oxide/Si stacks de‐gassed in high vacuum at 400 °C, the EWF of Pt is found to differ significantly from the accepted vacuum WF value of 5.6 eV. The EWF is equal to 5.2 eV at the Pt/Al2O3 interface, 5.1 eV at Pt/HfO2, 5.3 eV at Pt/Hf0.8Al0.2Ox, 4.8 eV at Pt/SiO2, and 5.8 eV at the Pt/Sr0.53Ti0.47O3 interface indicating the presence of a polarization layer of which the contribution to the EWF depends on the oxide composition. Furthermore, annealing in H2 at 400 °C reduces the Pt EWF by ∼0.5 eV at all interfaces except for the Pt/Sr0.53Ti0.47O3 one. This observation indicates the formation of an additional H‐related dipole at the Pt/oxide interfaces and suggests that the vacuum WF of Pt cannot be used as the value relevant for the MOS properties.
- 10 June 2015
- Published by AIP Publishing in Journal of Applied Physics
- Vol. 117 (22)
Ultra-thin ZrO2/SrO/ZrO2 insulating stacks for future dynamic random access memory capacitor applications
Aiming for improvement of the ZrO2-based insulator properties as compared to the state-of-the-art ZrO2/Al2O3/ZrO2 stacks beyond 20 nm dynamic random access memory (DRAM) technology applications, ultra-thin (5 nm) ZrO2/SrO/ZrO2 stacks with TiN electrodes deposited by physical vapor deposition are addressed. By replacing the Al2O3 interlayer with SrO, the effective dielectric permittivity of the stack can be increased as indicated by electrical analysis. At the same time, no degradation of the insulating properties of the SrO-containing stacks and minor changes in the reliability, compared to an Al2O3 interlayer, are found. These results are indicating the possibility of further reducing the effective oxide thickness of the ZrO2-based stacks to come close to 0.5 nm for future DRAM capacitors.
- 10 June 2015
- Published by AIP Publishing in Journal of Applied Physics
- Vol. 117 (22)
Ultra-thin ZrO2/SrO/ZrO2 insulating stacks for future dynamic random access memory capacitor applications
Aiming for improvement of the ZrO2-based insulator properties as compared to the state-of-the-art ZrO2/Al2O3/ZrO2 stacks beyond 20 nm dynamic random access memory (DRAM) technology applications, ultra-thin (5 nm) ZrO2/SrO/ZrO2 stacks with TiN electrodes deposited by physical vapor deposition are addressed. By replacing the Al2O3 interlayer with SrO, the effective dielectric permittivity of the stack can be increased as indicated by electrical analysis. At the same time, no degradation of the insulating properties of the SrO-containing stacks and minor changes in the reliability, compared to an Al2O3 interlayer, are found. These results are indicating the possibility of further reducing the effective oxide thickness of the ZrO2-based stacks to come close to 0.5 nm for future DRAM capacitors.
- 1 January 2015
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 129-132
Schottky barrier height engineering for next generation DRAM capacitors
DRAM capacitors are reaching the scaling limit and new approaches are necessary to enable further reduction of the physical thickness of the capacitor dielectric. The Schottky Barrier Height (SBH) of a noble metal electrode (Pt) on atomic layer deposited ZrO 2 /Al 2 O 3 /ZrO 2 (ZAZ, 6 nm) was evaluated and compared to a TiN electrode. Internal Photo Emission Spectroscopy (IPE) and Photoconductivity measurement (PC) were used to estimate the SBH and band gap, respectively. The SBH difference between the two electrodes was evaluated in comparison with a previously reported model. Finally, the impact of an increased SBH on dielectric scaling will be discussed based on a leakage current simulation of a ZrO 2 capacitor.
- 1 January 2015
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 129-132
Schottky barrier height engineering for next generation DRAM capacitors
DRAM capacitors are reaching the scaling limit and new approaches are necessary to enable further reduction of the physical thickness of the capacitor dielectric. The Schottky Barrier Height (SBH) of a noble metal electrode (Pt) on atomic layer deposited ZrO 2 /Al 2 O 3 /ZrO 2 (ZAZ, 6 nm) was evaluated and compared to a TiN electrode. Internal Photo Emission Spectroscopy (IPE) and Photoconductivity measurement (PC) were used to estimate the SBH and band gap, respectively. The SBH difference between the two electrodes was evaluated in comparison with a previously reported model. Finally, the impact of an increased SBH on dielectric scaling will be discussed based on a leakage current simulation of a ZrO 2 capacitor.