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This work investigates the noise characteristics of filamentary- and interfacial-type resistive random-access memory devices in a single material system based on La 2 NiO 4 + δ , using low-frequency noise spectroscopy across different resistance states, read voltages, and device sizes. We observe a clear difference in the noise properties of the two device types: (i) filamentary devices exhibit overall elevated noise levels compared with the interfacial ones, (ii) the relative noise magnitude between high (HRS) and low resistance states (LRS) in the two device types is inverted: elevated noise is present in the HRS of filamentary devices and in the LRS of interfacial ones and vice versa, (iii) no area dependence of noise properties is observed for the filamentary devices, whereas interfacial devices show a size-dependent frequency exponent and noise magnitude scaling. For both switching mechanisms, a systematic two-stage noise suppression with increasing read voltages is observed, which is found to be correlated with the transition from ohmic to space-charge-limited conduction. Our study links noise characteristics to the underlying switching and conduction mechanisms of oxygen vacancy migration-based memories.

Scaling resistive random-access memory (RRAM) toward ultradense crossbar arrays for high-density storage and neuromorphic computing requires precise nanoscale control of conductive filaments for reliable multilevel operation. Here we directly visualize and modulate nanoscale filament evolution in substoichiometric Y2O3–x thin films using high-resolution in situ conductive atomic force microscopy (c-AFM) with controlled current compliance. The switching threshold systematically increases with increasing oxygen stoichiometry, while filament evolution is continuously modulated by varying the applied bias. The initially formed larger filaments persist and dominate subsequent switching events during multicycle measurements. Using the c-AFM tip as a nanoscale mobile top electrode, single-point switching reveals localized switching with a lateral influence of approximately 20 nm, defining a crosstalk length scale. These results directly link oxygen stoichiometry, microstructure, filament evolution, and switching length scales, providing new insight into nanoscale filamentary switching and physical guidelines for scaling polycrystalline memristors toward ultradense memory and neuromorphic applications.

Memristor-based configuration memory offers an alternative solution to the volatility and large area overhead of conventional Static Random Access Memory (SRAM)-based FPGA configuration memory. Their non-volatile nature and the possibility of stacking them on top of the logic layer in a process called Back-End-Of-Line (BEOL) manufacturing help not only dramatically reduce area consumption but also significantly reduce startup time. However, due to the comparatively high defect probability caused by manufacturing defects, traditional approaches for defect tolerance are not fit to address these defects. This work introduces an approach to defect-aware and tolerant synthesis. Based on this, an investigation into the defect tolerance of different architecture choices regarding the size of LUTs and the fracturability of LUTs is presented. We can show that smaller, non-fracturable LUTs exhibit a higher defect tolerance. Moreover, multiple strategies to improve the mapping result based on the properties of the logic functions are introduced. Notably, reducing the mapping complexity of logic clusters during the packing stage significantly improves the mapping success rate.

As with any memory device, programming a memristor involves trade-offs between power, energy, and time. In this letter, we investigate in detail how these factors are interrelated under different programming conditions. We show that, under time constraints, lower energy consumption can be achieved using faster programming pulses at the cost of increased power dissipation. Conversely, when limiting the maximum power is the priority, longer programming times are required to minimize energy consumption. These trade-offs ultimately stem from the physical response time of ions and vacancies involved in the formation and dissolution of the conductive filament within the oxide layer of a metal-insulator-metal (MIM) structure. We begin by analytically examining the effect of applying a single trapezoidal pulse to the device. Next, we extend the analysis to multiple pulses, using a compact recursive approach to model both potentiation and depression. Finally, we perform SPICE simulations under unconstrained programming conditions. Modeling and simulations are based on the Dynamic Memdiode Model, combined with the Method of Elementary Solvers. Given the variability of device parameters and experimental conditions, we provide the complete SPICE schematic to allow interested readers to explore different scenarios and tailor the analysis to their specific use cases.

This work investigates the spectral and energetic aspects of memristor programming using generalized Gaussian voltage pulses. Unlike conventional square or triangular waveforms, generalized Gaussian pulses enable precise control over both temporal shape and frequency content through a tunable shape parameter. By systematically varying the pulse’s effective width and sharpness, we analyze the resulting current response and its dependence on the memristor’s nonlinear and memory-driven dynamics. SPICE simulations reveal how pulse shaping directly affects the spectral distribution, instantaneous power consumption, total programming energy, and programming time. The results highlight key trade-offs among frequency-domain characteristics, pulse amplitude, and energy efficiency, providing practical design guidelines for energy-aware memristive programming. Controlling the frequency spectrum in memristive circuits is critical to preventing parasitic elements in wires and devices from introducing additional signal distortion, which could compromise the accuracy and reliability of in-memory operations. These findings have potential implications for low-power neuromorphic computing, analog signal modulation, and waveform-optimized memory architectures.

Hafnium oxide (HfO ₂ ) exhibits multiple polymorphs, each with distinct properties and is a promising material for non‐volatile memory technologies in radiation‐harsh environments. To gain a comprehensive understanding of the radiation response of HfO ₂ ‐based memory devices requires detailed investigations of ion beam‐induced phase changes as well as, recrystallization processes and amorphization in the different HfO ₂ polymorphs. This study explores the effects of swift heavy‐ion irradiation on HfO ₂ in resistive random‐access memories (RRAM) and metal‐insulator‐metal (MFM) capacitors, using 1.635 GeV Au ions, to simulate an extreme damage scenario, and 183 MeV Ca ions, which are more relevant to space missions due to their lower mass. The exposure of RRAM layers and MFM capacitors to Ca ions has a negligible effect on the crystallinity of HfO ₂ with little to no impact on the switching behavior of the capacitors, indicating that the energy loss threshold for inducing phase transitions is not exceeded. Comparing La‐doped HfO ₂ (HLO) and hafnium zirconium oxide (HZO) MFM capacitors reveals that HZO exhibits remarkable resilience against Au ion irradiation up to fluences of 7 × 10 ¹² ions/cm ² , without any reduction in saturation polarization and that the ferroelectric properties of HLO and HZO can be restored and even enhanced through post‐irradiation cycling.

Efficient computing systems require low‐power and high‐density memory technologies capable of supporting advanced applications such as neuromorphic computing and artificial intelligence. Hafnium oxide (HfO ₂ ) based resistive random‐access memory (RRAM) is a promising candidate to this end because of its Complementary Metal‐Oxide‐Semiconductor (CMOS) compatibility and reliable switching behavior. In this work, the effects of lanthanum (La) doping in hafnium oxide are assessed in connection with the memristor performance for neuromorphic applications. It shows that substitution of La stabilizes the cubic phase of (Hf,La)O ₂ lowering the oxygen vacancies formation energy and, thereby, favoring their migration properties. La‐doped HfO ₂ ‐based memristors show reduced forming and operating voltages, improved switching uniformity, and increased endurance. These memristors exhibit electric field‐driven resistive switching with low voltage variability and most important linear conductance modulation under ultra‐fast pulsed stimulation. These improvements indicate that La‐doped HfO ₂ memristors offer significant advantages for energy efficient and reliable analog computing as compared to undoped devices. These findings suggest that La‐doped HfO ₂ RRAM has the potential to be a key technology for future analog neuromorphic applications in next‐generation computing architectures.

Spiking neural networks (SNNs) require neuron devices that are both compact and capable of supporting continuous-time and event-based dynamics. Here, we demonstrate a VO_x-based threshold switching memristor (TSM) that intrinsically enables dual-mode operation, functioning as both a spiking encoder and a leaky integrate-and-fire (LIF) neuron. While such dual behavior is theoretically possible in volatile memristors, it has only been experimentally demonstrated in limited cases. It is achieved intrinsically in a single VO_x-based device, arising from a thermally driven insulator-to-metal transition (IMT) within the VO_x layer, confirmed by temperature-dependent XRD and correlated with snap-back negative differential resistance (NDR) observed in electrical measurements. Integrated into a passive circuit, the device generates high-frequency spike trains under analog input and tunable LIF responses under pulsed stimulation. The device achieves a maximum spiking frequency of 570 kHz, a time-to-first-spike (TTFS) of 1.6 μs, and energy consumption as low as 4.7 nJ per spike. These results highlight the strong coupling between structural phase dynamics and neuronal functions, positioning the VO_x TSM as a promising platform for scalable neuromorphic hardware with biologically realistic spiking capabilities.

Resistive random-access memory based on hafnia is a potential candidate for next-generation memories. However, there are some key challenges to overcome, including the stochastic nature of the filament formation during electroforming and SET operation, which results in large cycle-to-cycle and device-to-device variability. Here, we propose a device setup with an artificial virtual electrode layer of conducting oxygen-deficient HfO_x and a well-defined self-limited oxidized switching layer to reduce the stochasticity of filament growth. We have realized this concept in TiN/HfO_x/HfO₂/Pt device stacks by adjusting the oxygen content in the artificial virtual electrode during growth in a molecular beam epitaxy system and subsequent self-limited surface oxidation in an oxygen-rich atmosphere. The artificial virtual electrode functions as a conducting oxygen vacancy exchange layer (COVEL) due to the inherent low oxygen content, providing an unlimited oxygen vacancy reservoir that stabilizes the filament in the thin oxidized switching layer. Detailed electrical characterization demonstrates that the COVEL, combined with the self-limited oxidized switching layer, can significantly reduce electroforming and SET voltage stochasticity and thus contribute to improving the switching reliability.

We explored the role of electric-field engineering in controlling filamentary-type conduction in Cu/HfO2/Pt memristive devices, utilizing the quantum point-contact (QPC) model for analysis. In a previous study, we reported that devices with a thicker oxide layer stack (20 and 15 nm) statistically exhibit higher resistance values in the high-resistance state (HRS) compared to devices with a thinner oxide layer stack (10 nm). In addition, thicker oxides exhibit higher and more broadly distributed set voltages compared to the more uniform distribution of set voltages occurring in thinner oxide layers. In this work, we thoroughly analyzed the electron transport characteristics of the electroformed devices (Cu conducting filament) using the QPC model, which allows us to infer the main features of the confinement potential barrier at the constriction's bottleneck. The obtained results indicate that the HRS current for the three thicknesses investigated follows a trend consistent with the predictions of the QPC model in terms of the aspect ratio energy barrier thickness/constriction radius (tB/R). Notably, the 10 nm samples exhibit a lower aspect ratio (tB/R < 1: wide nanogap) than the 15 and 20 nm samples (tB/R > 1: elongated nanogap). It was found that wide nanogaps are associated with lower variance of the HRS current and smaller set voltages. In view of these results, we suggest that optimizing the switching oxide layer thickness, therefore the shape of the filament, may be a suitable way to reduce variability of HRS current and set voltage to improve resistive switching performance.