Andy D. Pimentel

Deep learning (DL) compilers rely on cost models and auto-tuning to optimize tensor programs for target hardware. However, existing approaches depend on large offline datasets, incurring high collection costs and offering suboptimal transferability across platforms. In this paper, we introduce TCL , a novel efficient and transferable compiler framework for fast tensor program optimization across diverse hardware platforms to address these challenges. Specifically, TCL is built on three core enablers: (1) the RDU Sampler , a data-efficient active learning strategy that selects only 10% of tensor programs by jointly optimizing R epresentativeness, D iversity, and U ncertainty, substantially reducing data collection costs while maintaining near-original model accuracy; (2) a new Mamba-based cost model that efficiently captures long-range schedule dependencies while achieving a favorable trade-off between prediction accuracy and computational cost through reduced parameterization and lightweight sequence modeling; and (3) a continuous knowledge distillation framework that effectively and progressively transfers knowledge across multiple hardware platforms while avoiding the parameter explosion and data dependency issues typically caused by traditional multi-task learning. Extensive experiments validate the effectiveness of each individual enabler and the holistic TCL framework. When optimizing a range of mainstream DL models on both CPU and GPU platforms, TCL achieves, on average, 16.8 × and 12.48 × faster tuning time, and 1.20 × and 1.13 × lower inference latency, respectively, compared to Tenset-MLP.

Embedded Systems Week (ESWEEK) is the premier event covering all aspects of embedded systems and software, which brings together three leading conferences (CASES, CODES+ISSS, and EMSOFT), one symposium, three hot-topic workshops, five special sessions, a panel, five tutorials, five education classes, two competitions with demos, and a PhD forum and recruiting event. As such, ESWEEK presents attendees with a wide range of choices, unveiling state-of-the-art embedded systems design and hardware/software architectures.

Optimizing performance and energy efficiency in many-core processors, especially within Non-Uniform Cache Access (NUCA) architectures, remains a critical challenge. The performance heterogeneity inherent in S-NUCA systems complicates task scheduling due to varying cache access latencies across cores. This paper introduces a novel QoS management policy to maintain application execution within predefined Quality of Service (QoS) targets, measured using the Application Heartbeats framework. QoS metrics like Heartbeats ensure predictable application performance in dynamic computing environments. The proposed policy dynamically controls QoS by orchestrating task migrations within the S-NUCA many-core system and adjusting the clock frequency of cores. After satisfying the QoS objectives, the policy optimizes energy efficiency, reducing overall system energy consumption without compromising performance constraints. Our work leverages the state-of-the-art multi-/many-core simulator {\em HotSniper}. We have extended it with two key components: an integrated heartbeat framework for precise, application-specific performance monitoring, and our QoS management policy that maintains application QoS requirements while minimizing the system's energy consumption. Experimental evaluations demonstrate that our approach effectively maintains desired QoS levels and achieves 18.7\% energy savings compared to state-of-the-art scheduling methods.

The advancement and widespread adoption of computing technology has yielded services that could help mitigate the climate crisis. However, the retirement of obsolete equipment, the consumption of rare earth materials, and the escalating energy demands associated with massive data processing and cloud infrastructures have raised new environmental dilemmas. Existing design and development methodologies primarily focus on fulfilling functional requirements and improving performance. In this paper, we argue that these methodologies must be augmented with sustainability considerations encompassing energy efficiency, material usage, longevity, and upgradability. Solutions at different layers of the system stack, from the physical to the application layer, must be integrated. Moreover, there should be a strong focus on the transparency of sustainability metrics across the whole computing continuum. Building on fruitful discussions at the international Lorentz workshop on Future Computing for Digital Infrastructures, we advocate novel approaches in the design, development, and operation of the computing continuum.