Maria N. Koryazhkina

Computing in memory represented by resistive switching (memristive) devices is a promising way to implement hardware for artificial neural networks. We see it as the way to create energy-efficient and high-performance systems for solving a wide range of tasks in artificial intelligence. Here, we present the structure and performance of our crossbar array based on Au/Ta/ZrO₂(Y)/Pt/Ti memristive devices, integrated into a complementary metal–oxide–semiconductor fabrication process, and then demonstrate its applicability for the hardware implementation of artificial neural networks. The array contains 256 memristive devices combined into 32 columns and eight rows. Each memristive device is paired with an n-channel metal–oxide–semiconductor transistor. As the results of the simulations show, these devices enable running neural network algorithms for solving recognition problems using the Modified National Institute of Standards and Technology dataset with 98% accuracy and the Canadian Institute for Advanced Research (10 classes) dataset with at least 77.5% accuracy, even taking into account the errors of mapping weights onto the memristive crossbar. Fully hardware recognition of 4 bit images demonstrated in this work highlights the crucial role of selective transistors for such tasks. This paper explores the exciting potential of memristor-based components of neuroelectronics as the building blocks for a new era of artificial intelligence hardware, capable of surpassing current computational limitations, as well as their role in the ongoing transition to hybrid intelligence based on the symbiosis of electronic and biological systems.

Cycle-to-cycle prediction of Resistive Random-Access Memory (ReRAM) dynamics is limited by stochastic switching and drift, while per-cycle compact-model extraction from current waveforms is ill-conditioned in high-fidelity models, yielding unstable adjacent-cycle states. We propose a Memristor Evolution Model (MEVM): given the previous $k$ cycles, it forecasts the next-cycle current waveform and projects the forecast to simulator-ready Yakopcic parameter vectors via differentiable inverse fitting under the known stimulus, yielding cycle-resolved $\mathbf {P}_{n}$ for SPICE/Verilog-A simulation and avoiding supervision on noisy per-cycle parameter traces. On a $\sim {10}^{{4}}$ -cycle $\mathrm{TaO}_{x}$ / ZrO₂(Y) ReRAM dataset, in a unified Yakopcic-ODE benchmark, MEVM reduces waveform reconstruction MSE from ${0}.{223}$ to ${0}.{140}$ ( $\times {10}^{-{3}}$ mA²) versus the strongest widely used parameter-to-parameter baselines, while preserving a compact-model interface. Cross-stimulus reuse confirms transferability: parameters extracted from sinusoidal cycles achieve ${0}.{072}\times {10}^{-{3}}$ mA² MSE when simulating a triangular drive, with no re-estimation or fine-tuning. A similarity-based nearest-neighbor warm start reduces inverse fitting from 200 to 35 iterations.

The electrical characteristics and resistive switching properties of memristive devices have been studied in a wide temperature range. The insulator and electrode materials of these devices (silicon oxide and titanium nitride, respectively) are fully compatible with conventional complementary metal-oxide-semiconductor (CMOS) fabrication processes. Silicon oxide is also obtained through the low-temperature chemical vapor deposition method. It is revealed that the as-fabricated devices do not require electroforming but their resistance state cannot be stored before thermal treatment. After the thermal treatment, the devices exhibit bipolar-type resistive switching with synaptic behavior. The conduction mechanisms in the device stack are associated with the effect of traps in the insulator, which form filaments in the places where the electric field is concentrated. The filaments shortcut the capacitance of the stack to different degrees in the high-resistance state (HRS) and in the low-resistance state (LRS). As a result, the electron transport possesses an activation nature with relatively low values of activation energy in an HRS. On the contrary, Ohm’s law and tunneling are observed in an LRS. CMOS-compatible materials and low-temperature fabrication techniques enable the easy integration of the studied resistive-switching devices with traditional analog–digital circuits to implement new-generation hardware neuromorphic systems.

Herein, the effect of training pulse parameters on the synaptic plasticity of a ZrO₂(Y)‐based memristive device has been investigated. It is shown that the potentiation and depression significantly depend on the amplitude and shape of the training pulses. The most stable synaptic plasticity is observed when considering training pulses with rectangular shape and maximum amplitude value. In contrast, there is a rather weak dependence of the potentiation and depression on the number of pulses in trains. The observed effect can be explained in terms of the work required to change the resistive state. Moreover, a ZrO₂(Y)‐based memristive device exhibits distinguishable potentiation and depression for at least 1000 cycles.

Nowadays, memristors are of considerable interest to researchers and engineers due to the promise they hold for the creation of power-efficient memristor-based information or computing systems. In particular, this refers to memristive devices based on the resistive switching phenomenon, which in most cases are fabricated in the form of metal–insulator–metal structures. At the same time, the demand for compatibility with the standard fabrication process of complementary metal–oxide semiconductors makes it relevant from a practical point of view to fabricate memristive devices directly on a silicon or SOI (silicon on insulator) substrate. Here we have investigated the electrical characteristics and resistive switching of SiO_x- and SiN_x-based memristors fabricated on SOI substrates and subjected to additional laser treatment and thermal treatment. The investigated memristors do not require electroforming and demonstrate a synaptic type of resistive switching. It is found that the parameters of resistive switching of SiO_x- and SiN_x-based memristors on SOI substrates are remarkably improved. In particular, the laser treatment gives rise to a significant increase in the hysteresis loop in I–V curves of SiN_x-based memristors. Moreover, for SiO_x-based memristors, the thermal treatment used after the laser treatment produces a notable decrease in the resistive switching voltage.

We propose a memristive interface consisting of two FitzHugh–Nagumo electronic neurons connected via a metal–oxide (Au/Zr/ZrO₂(Y)/TiN/Ti) memristive synaptic device. We create a hardware–software complex based on a commercial data acquisition system, which records a signal generated by a presynaptic electronic neuron and transmits it to a postsynaptic neuron through the memristive device. We demonstrate, numerically and experimentally, complex dynamics, including chaos and different types of neural synchronization. The main advantages of our system over similar devices are its simplicity and real-time performance. A change in the amplitude of the presynaptic neurogenerator leads to the potentiation of the memristive device due to the self-tuning of its parameters. This provides an adaptive modulation of the postsynaptic neuron output. The developed memristive interface, due to its stochastic nature, simulates a real synaptic connection, which is very promising for neuroprosthetic applications.