Giovanna Turvani

Recent advancements in Quantum Computing and Machine Learning have increased attention to Quantum Machine Learning (QML), which aims to develop machine learning models by exploiting the quantum computing paradigm. One of the widely used models in this area is the Variational Quantum Circuit (VQC), a hybrid model where the quantum circuit handles data inference while classical optimization adjusts the parameters of the circuit. The quantum circuit consists of an encoding layer, which loads data into the circuit, and a template circuit, known as the ansatz, responsible for processing the data. This work involves performing an analysis by considering both Amplitude- and Angle-encoding models, and examining how the type of rotational gate applied affects the classification performance of the model. This comparison is carried out by training the different models on two datasets, Wine and Diabetes, and evaluating their performance. The study demonstrates that, under identical model topologies, the difference in accuracy between the best and worst models ranges from 10% to 30%, with differences reaching up to 41%. Moreover, the results highlight how the choice of rotational gates used in encoding can significantly impact the model's classification performance. The findings confirm that the embedding represents a hyperparameter for VQC models.

This work presents AEQUAM (Area Efficient QUAntum eMulation), a toolchain that enables faster and more accessible quantum circuit verification. It consists of a compiler that translates OpenQASM 2.0 into RISC-like instructions, Cython software models for selecting number representations and simulating circuits, and a VHDL generator that produces RTL descriptions for FPGA-based hardware emulators. The architecture leverages a SIMD approach to parallelize computation and reduces complexity by exploiting the sparsity of quantum gate matrices. The VHDL generator allows customization of the number of emulated qubits and parallelization levels to meet user requirements. Synthesized on an Altera Cyclone 10LP FPGA with a 20-bit fixed-point representation and nearest-type approximation, the architecture demonstrates better scalability than other state-of-the-art emulators. Specifically, the emulator has been validated by exploiting the well consolidated benchmark of mqt bench framework.

Effective and accurate diagnosis of diseases such as cancer, diabetes, and heart failure is crucial for timely medical intervention and improving patient survival rates. Machine learning has revolutionized diagnostic methods in recent years by developing classification models that detect diseases based on selected features. However, these classification tasks are often highly imbalanced, limiting the performance of classical models. Quantum models offer a promising alternative, exploiting their ability to express complex patterns by operating in a higher-dimensional computational space through superposition and entanglement. These unique properties make quantum models potentially more effective in addressing the challenges of imbalanced datasets. This work evaluates the potential of quantum classifiers in healthcare, focusing on Quantum Neural Networks (QNNs) and Quantum Support Vector Machines (QSVMs), comparing them with popular classical models. The study is based on three well-known healthcare datasets -- Prostate Cancer, Heart Failure, and Diabetes. The results indicate that QSVMs outperform QNNs across all datasets due to their susceptibility to overfitting. Furthermore, quantum models prove the ability to overcome classical models in scenarios with high dataset imbalance. Although preliminary, these findings highlight the potential of quantum models in healthcare classification tasks and lead the way for further research in this domain.

In recent years, Computer-Aided Design (CAD) software have become indispensable tools for designing, testing, and synthesizing logic circuits. Commercial software provided by companies like Synopsys, Cadence, or Mentor dominate the Electronic Design Automation (EDA) field. Nevertheless, several Open Source tools are also available, and some of them aim at assisting the designer in emerging Beyond-von-Neumann computing paradigms, such as Logic-in-Memory (LiM). LiM is a promising architectural and technological solution to the von Neumann Bottleneck, i.e. the performance gap between the CPU and the memory in classical CPU-Memory structures. In literature, various approaches to the LiM paradigm have been proposed. This paper introduces the Design Explorer for In-Memory Architectures (DExIMA) tool, which has the ambitious aim of providing a well-defined design flow strategy for the development, validation and performance estimation of a wide range of LiM architectures. Currently, DExIMA focuses on Coarse-grain Logic-in-Memory (CGLiM) architectures, which integrate memory and computation elements at a coarse-grain level. Nevertheless, DExIMA encompasses a flexible architectural model and a modular performance estimation engine that can be adapted to LiM implementations where memory and logic elements are more finely integrated. Hence, DExIMA is a versatile tool offering an environment for testing and comparing different LiM solutions, empowering designers to explore novel approaches in LiM architecture design.

Combinatorial Optimization (CO) problems exhibit exponential complexity, constraining classical computers from providing fast and satisfactory outcomes. Quantum Computers (QCs) can effectively find optimal or near-optimal solutions by exploring the solutions space of a problem encoded in a qubits system, exploiting principles of quantum mechanics. However, non-idealities and high costs limit their availability. These can be overcome by emulating QCs on cheaper and more accessible classical computing platforms, like Field-Programmable Gate Arrays (FPGAs). This article presents a digital architecture, implementing the Ising-compatible Simulated Adiabatic Bifurcation algorithm. It mimics the quantum adiabatic evolution of a network of non-linear Kerr oscillators. The architecture, described in VHDL and targeting FPGAs, consists of processing elements for computing the Kerr oscillators’ evolution, a set of units considering their Ising-related interactions and an evolution variables update unit. The proposed approach includes a speedup-targeting approximation of the algorithm, a method for handling single-variable constraints, and a software model that allows architecture customization for specific problems. Tests were conducted using an Altera Cyclone V SoC with FPGA logic and the Nios II processor for interface purposes. The results demonstrate the functionality of the architecture and its scalability with the problem size, making it suitable for real-world applications.

Optimization is a crucial challenge across various domains, including finance, resource allocation, and mobility. Quantum computing has the potential to redefine the way we handle complex problems by reducing computational complexity and enhancing solution quality. Optimization, particularly of objective functions, stands to benefit significantly from quantum solvers, which leverage principles of quantum mechanics like superposition, entanglement, and tunneling. The Ising and Quadratic Unconstrained Binary Optimization (QUBO) models are the most suitable formulations for these solvers, involving binary variables and constraints treated as penalties within the overall objective function. To harness quantum approaches for optimization, two primary strategies are employed: exploiting quantum annealers—special-purpose optimization devices—and designing algorithms based on quantum circuits. This review provides a comprehensive overview of quantum optimization methods, examining their advantages, challenges, and limitations. It demonstrates their application to real-world scenarios and outlines the steps to convert generic optimization problems into quantum-compliant models. Lastly, it discusses available tools and frameworks that facilitate the exploration of quantum solutions for optimization tasks.

Researchers and industries are increasingly drawn to quantum computing for its computational potential. However, validating new quantum algorithms is challenging due to the limitations of current quantum devices. Software simulators are time and memory-consuming, making hardware emulators an attractive alternative. This article introduces AMARETTO (quAntuM ARchitecture EmulaTion TechnOlogy), designed for quantum computing emulation on low-tier Field-Programmable gate arrays (FPGAs), supporting Clifford+T and rotational gate sets. It simplifies and accelerates the verification of quantum algorithms using a Reduced-Instruction-Set-Computer (RISC)-like structure and efficient handling of sparse quantum gates. A dedicated compiler translates OpenQASM 2.0 into RISC-like instructions. AMARETTO is validated against the Qiskit simulators. Our results show successful emulation of sixteen qubits on a AMD Kria KV260 SoM. This approach rivals other works in emulated qubit capacity on a smaller, more affordable FPGA