Bernard Riera

Digital twin technology is a highly valued asset in the manufacturing sector, with its unique capability to bridge the gap between the physical and virtual parts. The impact of the rapid increase in this technology is based on the collection of real-world data, its standardization, and its widespread deployment on an existing manufacturing system. This encompasses sensor values, PLC internal states, and IoT, as well as how the means of linking these data with their digital counterparts. It is challenging to implement digital twins on a large scale due to the heterogeneity of protocols and data structuring of subsystems. To facilitate the integration of the digital twin into existing manufacturing architectures, we propose in this paper a framework that enables the deployment of scalable digital twins from sensors to services of digital twins in an iterative manner.

Le logiciel HOME I/O est le résultat d'un projet de R&D démarré en 2011 entre le laboratoire CReSTIC de l'Université de Reims Champagne-Ardenne (URCA) et Real Games, L’objectif était de concevoir une maison virtuelle pour l'enseignement des STEM (Sciences, Technologies, Ingénierie et Mathématiques) utilisable du collège à l'université. Lors des CETSIS en 2017 et 2021, HOME I/O et les premiers retours d’expérience ont été présentés. Cet article, décrit un module d’enseignement original d’initiation à la commande logique destiné à des étudiants en 2ème année de BUT « informatique » à l’IUT de Reims-Châlons-Charleville. HOME I/O, combiné avec Scratch 3 (logiciel utilisé au collège pour s’initier à la programmation), a été utilisé pour présenter les principaux concepts de la commande logique. L’approche pédagogique mise en œuvre, est basée sur un apprentissage par l'erreur, permettant aux étudiants d’appréhender, à partir des difficultés qu’ils ou elles rencontrent, les spécificités de l’informatique industrielle et de la commande logique. Les retours des étudiants obtenus au moyen de questionnaires anonymes sont globalement positifs.

Manufacturing systems (MS) have become increasingly complex due to constraints induced by a changing environment, such as flexibility, availability, competition, and key performance indicators. This change has led to a need for flexible systems capable of adapting to production changes while meeting productivity and quality criteria and reducing the risk of failures. This paper provides a methodology for designing reconfigurable and fault-tolerant control for implementation in a Programmable Logic Controller (PLC). The main contribution of this methodology is based on a safe control synthesis founded on timed properties. If a sensor fault is detected, the controller switches from normal behavior to a degraded one, where timed information replaces the information lost from the faulty sensor. Switching between normal and degraded behaviors is ensured through reconfiguration rules. The primary objective of this method is to implement the obtained control into a PLC. In order to achieve this goal, a method is proposed to translate the controllers of the two behaving modes and the reconfiguration rules into different Grafcets. This approach relies on the modular architecture of manufacturing systems to avoid the combinatorial explosion that occurs in several approaches.

Programmable logic controllers (PLCs) are everywhere today and perform critical tasks in industries. They are considered as a key component for the Industry 4.0. Before they are put into operation, it is necessary to check the accuracy of the PLC programs. This verification operation can be performed using model checkers. This stage is often long and costly and requires a domain expert who can understand the system, as well as the different model checker tools able to verify the code implemented in the controller. Furthermore, this verification often requires a conversion of the PLC code into a language understood by a model checker which can influence the behavior of the observed PLC. Hence, there is a need to propose methods and tools which could be used by technicians and engineers. The aim of this paper is to propose methods that require little work to set up and are robust to program sizes used in Industry 4.0. This paper explores some fresh ideas for human-adapted PLC code verification. We present different methods to test codes in structured text (ST) compliant with the IEC 61131-3 standard. Hence, the first idea is to test the ST code that will be directly implemented on a controller. For that, we propose a method using the model checker UPPAAL which allows us to obtain exact results on short codes. Second, we propose verifying the generic properties that a PLC program must avoid: deadlocks, non-accessible states and fugitive states or actions. To solve combinatory explosion problems encountered with the UPPAAL software, the third proposition consists of using relational databases. The same verification as previously followed can be obtained, but the search time is longer. The fourth and last proposal is to process the ST code with a neural network composed of long short-term memory layers (LSTM) to quickly determine the validity of the code. This method could give an approximation of code errors in a few seconds. The different proposed methods are supported with several examples.

Lors du CETSIS en 2017, HOME I/O a été présenté comme un outil pédagogique innovant. Ce logiciel est le résultat d'un projet de R&D entre le laboratoire CReSTIC de l'Université de Reims Champagne-Ardenne (URCA) et Real Games, partiellement financé par le Ministère de l'Education Nationale. L’objectif était de concevoir une maison virtuelle pour l'enseignement des STEM (Sciences, Technologies, Ingénierie et Mathématiques). L'idée principale, dès le début du projet, a été d'amener une maison virtuelle dans la salle de classe, adaptée aux apprenants et aux enseignants et utilisable du collège à l'université. HOME I/O est fourni avec CONNECT I/O, automate logiciel pouvant également servir de passerelle pour se connecter à des équipements externes (API, microcontrôleur, Matlab, Labview…) au moyen des protocoles Modbus TCP, OPC DA, OPC UA... Dans le monde entier, environ 800 collèges, lycées et universités utilisent HOME I/O. Les retours des enseignants et des étudiants ont été pris en compte en mettant régulièrement à jour HOME I/O avec de nouveaux modules et de nouvelles fonctionnalités comme l'intégration de Scratch 2.0 (2017) et l'intégration de Python 3.x (2019). Cet article présente ces nouvelles fonctionnalités et une sélection d'applications pé-dagogiques innovantes réalisées par des enseignants de collège, lycée, université et même d'école primaire ! HOME I/O semble prouver qu'il est possible de disposer d’un seul outil de simulation adapté à différents niveaux de formation et permettant des approches pédagogiques originales : classe inversée, jumeau numérique pédagogique, apprentissage par l'erreur, projets…

This brief presents an approach to safe controller synthesis for manufacturing systems controlled by programmable logic controllers (PLCs). In this brief, manufacturing systems are considered as discrete-event dynamic systems with logical inputs and outputs. The methodology is based on the use of safety constraints placed at the end of the PLC program. These constraints are checked offline by a formal approach and acted as a safety filter in order to be robust against control errors. The proposed approach separates the functional control part from the safety part and focuses on the latter. This brief presents the whole methodology and recent improvements on consistency checking of a set of Boolean expressions.