Sourish Banerjee

The increasing demand for high-voltage (> 1200 V) power devices has driven the epitaxy of thick GaN buffers on top of mechanically robust substrates such as engineered QST® substrates. This study investigates the material crystalline defects in vertical GaN buffers grown via metalorganic chemical vapor deposition (MOCVD) on 200 mm QST®, with and without pre-grown epitaxial lateral overgrown (ELOG) buffers. We present a systematic analysis of the threading dislocation density (TDD) using several destructive and non-destructive techniques such as transmission electron microscope (TEM), cathodoluminescence (CL), electron channelling contrast imaging (ECCI,) X-ray diffraction (XRD) and scanning probe microscopy (SPM). They reveal different dislocation types; i.e., edge, mixed and screw threading dislocations (TD). TEM reveals a ~ 5 times TDD reduction for stacks employing ELOG buffers. ECCI, CL and XRD complement one another with ~ 2 – 2.5 times reduced TDD on ELOG buffer. Whereas CL reveals all TDs involved in non-radiative recombination, ambiguity remains in ascribing the specific TD type. ECCI primarily identifies mixed TD. XRD analyses of GaN(0002) and (10-12) reflections reveal a systematic improvement of crystal quality with increasing drift layer (DL) thickness. ELOG buffer reveals ~ 4 times stronger screw TD reduction and > 6 times stronger edge TD reduction with increasing DL thickness, compared to the one without. Conductive AFM (c-AFM) measurements show that only ~ 0.1–0.2% of total TDs are electrically active contributing to vertical leakage, with > 3 times reduction of such TD on ELOG buffer. Cross-sectional SPM, CL and ECCI imaging further validate the reduced defectivity in ELOG-enabled stacks. The scanning capacitance microscope (SCM) |dC/dV| maps show reduced amplitude at defect sites and CL imaging clearly visualizes these darker non-radiative recombination regions, whereas ECCI complements these observations. In summary, this study presents a comprehensive defectivity analysis of GaN-on-QST® substrates with ELOG buffers, demonstrating their potential for vertical GaN device fabrication and up-scaling.

Gallium nitride is increasingly recognized as a leading material for power and radio frequency applications, due to its unique electronic properties. However, the phenomenon of wafer bow and warpage during GaN growth on heterogeneous substrates presents significant challenges for vertical-type GaN devices with increasing drift layer thickness (for high voltage applications, 1200 V and above) and substrate diameters scaling to 200 mm. In this study, we introduce a growth scheme in the metalorganic chemical vapor deposition of GaN on 200 mm “engineered” substrates from Qromis substrate technology, specifically to minimize the wafer bow for vertical GaN metal-oxide-semiconductor field-effect transistors featuring an 11.5 μm-thick drift layer, with an overall GaN stack of ∼15 μm. By systematically reducing the pressure during the growth of unintentionally doped GaN from 300 to 150 mbar on an Al0.3Ga0.7N buffer layer, the tensile stress induced during cooldown could be effectively compensated. This yields an overall low residual stress of the thick ∼15 μm epitaxially grown GaN layers on the engineered Qromis substrate technology® substrate.

We discuss a physical mechanism in the AlGaN/GaN high electron mobility transistors (HEMTs) that partial electrons from reverse gate leakage ( $\textit{I}_{\text{g,off}}$ ) inject into the HEMT buffer and thereby shift the HEMT threshold voltage ( $\Delta \textit{V}_{\text{th}}$ ). We analyze the $\Delta \textit{V}_{\text{th}}$ dependences on parameters including gate lengths, front barrier (FB) thickness, gate bias voltage, drain bias voltage, and the distance between the gate and the buffer. We specifically investigate the OFF-state stress with nonzero and zero $\textit{V}_{\text{ds}}$ . The experiment with zero $\textit{V}_{\text{ds}}$ helps identify the $\textit{I}_{\text{g,off}}$ induced C doped GaN (C-GaN) charging; while the one nonzero $\textit{V}_{\text{ds}}$ indicates a fast increase of C-GaN charging induced $\Delta \textit{V}_{\text{th}}$ with $\textit{V}_{\mathbf{ds}}$ . The $\Delta \textit{V}_{\text{th}}$ issue is significant for downscaled HEMTs with a short gate length and a close distance between the gate and the buffer. The issue is thus critical for downscaled HEMTs in high-speed RF applications. We propose a simple analytical expression for the $\Delta \textit{V}_{\text{th}}$ and demonstrate methods to reduce the $\Delta \textit{V}_{\text{th}}$ .

Fabrication of low-RF loss GaN-on-Si high electron mobility transistor stacks is critical to enable competitive front-end-modules for 5G and 6G applications. The main contribution to RF losses is the interface between the III-N layer and the HR Si wafer, more specifically the AlN/Si interface. At this interface, a parasitic surface conduction layer exists in Si, which decreases the substrate effective resistivity sensed by overlying circuitry below the nominal Si resistivity. However, a clear understanding of this interface with control of the parasitic channel is lacking. In this Letter, a detailed physical and electrical description of metalorganic chemical vapor deposition-grown AlN/Si structures is presented. The presence of a SiCxNy interfacial layer is revealed, and its importance for RF losses is shown. Through C–V and I–V characterization, an increase in the C concentration of this interfacial layer is linked to the formation of negative charge at the AlN/Si interface, which counteracts the positive charge present in the 0-predose limit. The variation of the TMAl predose is shown to allow precise tuning of the C composition and, consequently, the resulting interface charge. Notably, a linear relationship between the predose and the net interface charge is observed and confirmed by the fabrication of an AlN/Si sample with close to zero net charge. In addition, a higher Dit (∼2×1012cm−2) for such compensated samples is observed and can contribute to low-RF loss. An exceptionally high effective resistivity of above 8 kΩ cm is achieved, corresponding to an RF loss below 0.3 dB/mm at 10 GHz.

Herein, epitaxially regrown n⁺ (In)GaN source/drain layers for radio frequency high electron mobility transistors, addressing material and electrical characterization, are reported. A range of n⁺ GaN and n⁺ InGaN layers with indium 4–12 at% and silicon 0–5.1 × 10²⁰ cm⁻³ are evaluated. The active carrier concentration in n⁺ InGaN exceeds 2 × 10²⁰ cm⁻³. The layers exhibit so‐called V‐defects, observed by atomic force microscope and transmission electron microscope (TEM), which are associated with local composition changes. In addition to the high Si doping levels, nitrogen vacancies are also considered to contribute toward their net carrier concentration. Due to its relevance for device processing, selectivity analysis is performed, and the optimal process conditions for selective regrowth are identified. Regrowth under high temperature (800 °C) is found to be conducive to improved selectivity. However, a high thermal budget negatively impacts the overall regrowth process, as reported here for In_0.17Al_0.83N and Al_0.26Ga_0.74N barriers: whereas the InAlN barrier suffers from intermixing, the AlGaN barrier demonstrates high‐temperature stability. The impact of intermixing is studied from complementary TEM and DC electrical measurements. A low overall contact resistance of 75 Ω μm is obtained with the regrown n⁺ InGaN layers.

To make vertical GaN-based trench gate MOSFET devices commercially manufacturable, 200 mm engineered substrates with a poly-AlN core are a good substrate choice. The poly-AlN core, matched in thermal expansion to GaN, allows to grow high-quality thick GaN layers. Up to 11 $\mu$ m-thick GaN stacks were grown crack-free, with excellent control over the wafer warp. Breakdown values of 900 V were reached for the vertical p/n-junction. Full device processing was completed in a CMOS-compatible pilot line without any wafer breakage, demonstrating the mechanical strength of these substrates. On module level, a new gate trench profile combining a smooth sidewall and round corners, is presented. While a smooth sidewall is important for the ON-state performance of the devices, the rounded corners are beneficial for the OFF-state operation. A semi-vertical test vehicle was used to demonstrate the ON-state of the fabricated power transistors. For devices with an effective gate width ( $\textit{W}_{\text{G,\text{ef}\text{f}}}\text{)}$ of 180 mm and an active area of 1.4 mm $^{\text{2}}$ , an ON-state resistance could be achieved of 8 m $\Omega\cdot \text{cm}^{\text{2}}$ . By scaling the source contact length down, the device footprint could be decreased further. It is shown that for devices with a $\textit{W}_{\text{G,\text{ef}\text{f}}}$ of 60 mm this value could be further improved with best performing devices showing a 6.2 m $\Omega\cdot\text{ cm}^{\text{2}}$ ON-state resistance.

Amorphous gallium oxide thin films were grown by plasma-enhanced atomic layer deposition on (100) silicon substrates from trimethylgallium Ga(CH3)3 precursor and oxygen plasma. At 200 °C, the growth per cycle is in the range of 0.65–0.70 Å for O2 plasma exposure times ranging from 3 up to 30 s during each cycle. The effect of O2 plasma exposure times on the interfacial SiOx regrowth and the electrical properties was investigated. In situ spectroscopic ellipsometry shows that the SiOx regrowth occurs during the first three cycles and is limited to 0.27 nm for plasma times as long as 30 s. Increasing the O2 plasma exposure during each ALD cycle leads to a drastic decrease in the leakage current density (more than 5 orders of magnitude for 30 nm films), which is linked to the suppression of oxygen vacancy states as evidenced by spectroscopic ellipsometry. Interestingly, an increase in the dielectric constant with increasing O2 plasma exposure time is observed, reaching a value of εr∼14.2, larger than that of single crystalline β-Ga2O3. This study highlights the crucial role of oxygen plasma exposure time in the control and tuning of the electrical properties of amorphous gallium oxide films.

We report the successful preparation of polycrystalline gallium nitride (poly-GaN) layers by thermal atomic layer deposition (ALD) at low temperatures (375–425 °C) from trimethylgallium (TMG) and ammonia (NH₃) precursors. The growth per cycle (GPC) is found to be strongly dependent on the NH₃ pulse duration and the NH₃ partial pressure. The pressure dependence makes the ALD atypical. We propose that the ALD involves (i) the reversible formation of the hitherto-unreported TMG:NH₃ surface adduct, resulting from NH₃ physisorbing on a TMG surface site and (ii) the irreversible conversion of neighboring surface adducts to Ga–NH₂–Ga linkages. The pressure dependence arises from the presumed reversible nature of the adduct formation on the surface, equivalent to the known reversible nature of its formation in the gas phase in metal organic chemical vapor deposition reactions. Using in situ spectroscopic ellipsometry (SE), the GPC monitored as a function of several ALD parameters is as high as 0.1 nm/cycle at 60 s NH₃ pulse and 1.3 mbar NH₃ partial pressure. The changes in the growth pattern (as monitored by SE) caused by changes in the ALD parameters support the proposed growth model. Ex situ characterization reveals that the layer is carbon-free, has a polycystalline wurtzitic structure, and shows a decent conformaility over Si trenches. Tuning the ALD recipe allows us to vary the layer composition from Ga-rich to stoichiometric GaN. The Ga richness is attributed to the simultaneous TMG dissociation at the deposition temperatures. This work is the first full-scale report on low temperature thermal ALD of poly-GaN from industrial precursors, occurring via a novel chemical pathway and not requiring any radical assistance (such as plasma) as used before.

This article describes novel composite thin films consisting of GaN, C and Ga (referred to as ‘GaCN’, as an analogue to BCN and other carbonitrides) as a prospective material for future optical applications. This is due to their tuneable refractive index that depends on the carbon content. The composites are prepared by introducing alternating pulses of trimethylgallium (TMG) and ammonia (NH3) on silicon substrates to mimic an atomic layer deposition process. Since the GaCN material is hardly reported to the best of our knowledge, a comprehensive characterization is performed to investigate into its chemical nature, primarily to determine whether or not it exists as a single-phase material. It is revealed that GaCN is a composite, consisting of phase-segregated, nano-scale clusters of wurtzitic GaN polycrystals, in addition to inclusions of carbon, nitrogen and gallium, which are chemically bonded into several forms, but not belonging to the GaN crystals itself. By varying the deposition temperature between 400 and 600 oC, and the NH3 partial pressure between 0.7×10-3 and 7.25 mbar, layers with a wide compositional range of Ga, C and N are prepared. The role of carbon on the GaCN optical properties is significant: an increase of the refractive index from 2.19 at 1500 nm (for carbon-free polycrystalline GaN) to 2.46 (for GaCN) is achieved by merely 10 at. % of carbon addition. The presence of sp2 hybridized C=N clusters and carbon at the interface of the GaN polycrystals are proposed to determine their optical properties. Furthermore, the formation of the GaN polycrystals in the composite occurs through a TMG:NH3 surface-adduct assisted pathway, whereas the inclusions of carbon, nitrogen and gallium are formed by the thermal decomposition of the chemisorbed TMG species.

In this work, we study the charge carrier transport and electroluminescence (EL) in thin-film polycrystalline (poly-) GaN/c-Si heterojunction diodes realized using a plasma enhanced atomic layer deposition process. The fabricated poly-GaN/p-Si diode with a native oxide at the interface showed a rectifying behavior (I_on/I_off ratio ∼ 10³ at ±3 V) with current-voltage characteristics reaching an ideality factor n of ∼5.17. The areal (J_a) and peripheral (J_p) components of the current density were extracted, and their temperature dependencies were studied. The space charge limited current (SCLC) in the presence of traps is identified as the dominant carrier transport mechanism for J_a in forward bias. An effective trap density of 4.6 × 10¹⁷/cm³ at a trap energy level of 0.13 eV below the GaN conduction band minimum was estimated by analyzing J_a. Other basic electrical properties of the material such as the free carrier concentration, effective density of states in the conduction band, electron mobility, and dielectric relaxation time were also determined from the current-voltage analysis in the SCLC regime. Further, infrared EL corresponding to the Si bandgap was observed from the fabricated diodes. The observed EL intensity from the GaN/p-Si heterojunction diode is ∼3 orders of magnitude higher as compared to the conventional Si only counterpart. The enhanced infrared light emission is attributed to the improved injector efficiency of the GaN/Si diode because of the wide bandgap of the poly-GaN layer and the resulting band discontinuity at the GaN/Si interface.