Tsung-Han Tsai

Achieving efficient and scalable multi-objective process optimization in the semiconductor industry poses significant challenges due to the complexity of multi-machine and multi-product scenarios, high-dimensional parameter spaces, and limited availability of real manufacturing data—especially in cutting-edge applications involving wide-bandgap (WBG) materials such as SiC and GaN. To address these issues, we introduce ADEPT (Adaptive Deep fEature-based Policy opTimization), an integrated Digital Twin (DT) framework that fuses multi-stage learning, Reinforcement Learning (RL), Gaussian Processes (GP), and dynamic deep feature extraction. Validated on real-world epitaxial (Epi) process data, ADEPT demonstrates robust performance under strict data constraints by leveraging GP-based uncertainty to guide RL exploration. Furthermore, by incorporating advanced meta-learning and transfer-learning (MLTL) strategies, ADEPT efficiently adapts to newly introduced machines and WBG-oriented product lines, expediting deployment and minimizing data requirements. We also provide rigorous mathematical convergence analysis, proving a high-probability guarantee of near-optimal solutions under appropriate assumptions, thus paving the way for future advancements in smart manufacturing.

Achieving optimal parameter settings in epitaxial silicon carbide (Epi SiC) manufacturing is challenging due to the need to simultaneously meet conflicting multi-objective requirements, such as precise thickness control and uniform doping. This paper presents an extended Digital Twin (DT) framework that incorporates the Multi-Objective Optimization with Deep-Feature Gaussian Process (MOODFG) algorithm, explicitly extending our prior DT-in-the-loop framework (MRBORI) in [26] from single-objective tuning to spec-driven multi-objective recipe optimization. The framework enables the effective optimization of high-dimensional and interdependent process parameters, overcoming limitations of traditional methods. The key innovation of the MOODFG algorithm lies in its integration of deep feature extraction and Gaussian Process Regression, which allows dynamic refinement of feature representations and surrogate models through iterative learning. Unlike MRBORI [26] (one objective per run), MOODFG minimizes a weighted distance to a user-specified target vector (e.g., thickness and doping) and provides an uncertainty-aware target-attainment certificate with a practical stopping rule for deployment. This approach ensures robust convergence to optimal parameter values while efficiently balancing multiple objectives. Experimental validation using real-world Epi SiC manufacturing data demonstrates significant improvements in yield, parameter stability, and process adaptability, highlighting the framework’s transformative potential for semiconductor manufacturing.

This paper introduces CLARiC (Contrastive Learning and Root-cause Inference with Causality), a next-generation AI framework that unifies anomaly detection, causal inference, and explainable AI (XAI) techniques to advance the state of smart manufacturing. Unlike existing methods limited to correlation-based insights or opaque “black-box” models, CLARiC stands out in four key ways. First, it employs multimodal contrastive learning—fusing sensor streams, text logs, and images—to robustly distinguish normal from anomalous data, even under severe class imbalance or shifting operational conditions. Second, the approach extends beyond correlation by integrating causal inference (e.g., propensity score matching, difference-in-differences), thereby identifying high-impact factors that genuinely drive process deviations. Third, through counterfactual simulations in the learned embedding space and controlled real-world interventions, CLARiC verifies whether modifying specific parameters actually enhances manufacturing outcomes—reducing defects, boosting yield, and mitigating equipment drifts. Finally, the framework’s built-in XAI components deliver transparent, fine-grained explanations, enabling domain experts to trace anomalies back to root causes with clear causal pathways rather than post-hoc guesswork. Rigorous theoretical analyses confirm robust representation learning and consistent causal predictions across heterogeneous environments. Empirically, CLARiC lowered real-line abnormal rates by 34% in a 30-day WBG semiconductor trial and outperformed the best state-of-the-art baseline by $\approx ~3$ percentage points in accuracy and F1-score, underscoring its effectiveness from wide-band-gap semiconductors to automotive assembly lines. By bridging anomaly detection, interpretability, and validated causal interventions, CLARiC offers a decisive step forward in industrial AI for mission-critical manufacturing.

The semiconductor industry currently lacks a robust, holistic method for detecting parameter drifts in wide-bandgap (WBG) manufacturing, where conventional fault detection and classification (FDC) practices often rely on static thresholds or isolated data modalities. Such legacy approaches cannot fully capture the intricate, multi-modal shifts that either gradually erode product quality or trigger abrupt process disruptions. To surmount these challenges, we present M2D2 (Multi-Machine and Multi-Modal Drift Detection), an end-to-end framework that integrates data preprocessing, baseline modeling, short- and long-term drift detection, interpretability, and a drift-aware federated paradigm. By leveraging self-supervised or unsupervised learning, M2D2 constructs a resilient baseline of nominal behavior across numeric, textual, and categorical features, thereby facilitating the early detection of both rapid spikes and slow-onset deviations. An interpretability layer—using attention visualization or SHAP/LIME—delineates which sensors, logs, or batch identifiers precipitate each drift alert, accelerating root-cause analysis. An active learning loop dynamically refines threshold settings and model parameters in response to real-time feedback, reducing false positives while adapting to evolving production conditions. Crucially, M2D2’s drift-aware federated learning mechanism reweights local updates based on each site’s drift severity, preserving global model integrity at scale. The key scientific breakthrough of this work lies in combining advanced multi-modal processing, short- and long-term anomaly detection, transparent model explainability, and an adaptive federated infrastructure—all within a single, coherent framework. Evaluations of real WBG fabrication data confirm that M2D2 substantially improves drift detection accuracy, broadens anomaly coverage, and offers a transparent, scalable solution for next-generation semiconductor manufacturing.

Advanced semiconductor manufacturing increasingly depends on Virtual Metrology (VM) for real-time quality monitoring, yet conventional data-driven models rarely capture the scarce or extreme process conditions critical for robust predictions. We propose a Multi-Stage Constrained Data Generative Augmentation (MSC-DGA) framework that integrates Variational Autoencoders (VAE), Normalizing Flows, and Constrained Diffusion to systematically expand coverage of seldom-seen regimes. By embedding strict engineering constraints during generation and applying a two-stage quality filter, MSCDGA ensures physically plausible synthetic samples. We further present theoretical proofs showing that multi-stage generation can approximate complex sensor distributions while enforcing domain validity, thereby improving coverage and preserving essential process physics. Empirically, we demonstrate the approach on real WBG SiC data, incorporating these curated samples into a Generative Foundation Model (GFA-VM) with few-shot finetuning and uncertainty-based active sampling, yielding significant accuracy gains for rarely observed conditions. Experiments confirm notable performance improvements over single-stage augmentation and naive oversampling. By rigorously balancing distribution realism with engineering feasibility, MSC-DGA offers a practical and theoretically grounded advancement for VM, enhancing adaptive control and product quality in next-generation power semiconductor manufacturing.

High-precision wafer metrology poses significant cost and throughput challenges in modern semiconductor manufacturing, where frequent process changes and recipe variations demand highly adaptive and scalable solutions. In this paper, we present a Generative-FewShot-Active Virtual Metrology (GFA-VM) framework that unifies large-scale generative modeling, few-shot fine-tuning, and uncertainty-driven active sampling into a single, data-centric system. A foundational generative model, built on a hybrid architecture of Transformer networks and Variational Autoencoders (VAEs), learns diverse sensor characteristics in an offline stage without relying on extensive labeled data. During online inference, the model produces both wafer quality predictions and predictive uncertainties; samples exceeding a dynamic uncertainty threshold are selected for physical measurement and few-shot model recalibration. This selective sampling both reduces measurement costs and adapts rapidly to new process conditions (e.g., novel recipes or equipment upgrades), requiring only a handful of freshly labeled wafers. The paper further addresses the long-term stability of the system through a self-updating mechanism that adjusts the uncertainty threshold when distributional shifts occur. Empirical evaluations confirm that our GFA-VM approach achieves state-of-the-art accuracy while significantly reducing metrology overhead compared to conventional virtual metrology methods. Additionally, rigorous theoretical analyses—including proofs of convergence and label cost bounds—demonstrate the reliability of using a generative foundation plus meta-learning technique. By fostering on-demand adaptation within a closedloop framework, GFA-VM offers a comprehensive, scalable strategy for next-generation semiconductor process control.

Despite recent advances in Digital Twin (DT) technologies for semiconductor manufacturing, no existing research convincingly demonstrates a unified, rapidly scalable, and data-efficient DT framework that can effectively handle stringent multi-objective optimization under severe data scarcity. This absence of a comprehensive approach impedes widespread industry adoption, given the pressing need for flexible, universal solutions that rapidly adapt to diverse machines and processes. This study introduces MOODFG-MLTL, an innovative algorithm that integrates Meta-Learning and Transfer Learning within a Multi-Objective Optimization using Deep-Feature Gaussian Processes (MOODFG) architecture. By harnessing a centralized meta-model repository and dynamically refining surrogate models, the proposed framework efficiently leverages limited data and transfers knowledge across heterogeneous manufacturing configurations. In our experimental validation with Epi SiC processes, MOODFG-MLTL achieves near-optimal wafer thickness and doping control using only 15 samples—reducing data requirements by approximately 50% while converging up to 40% faster compared to conventional approaches. Experimental validation in epitaxial silicon carbide (Epi SiC) scenarios demonstrates that the MOODFG-MLTL not only maintains robust performance under constrained data conditions but also accelerates the deployment of data-efficient, multi-objective DT solutions. This advancement provides a critical foundation for achieving universal, intelligent DT implementations in the semiconductor industry’s evolving landscape.

This paper introduces an intelligent optimization framework that integrates Digital Twin (DT) technology, deep learning, and a tailored Multi-Restart Bayesian Optimization with Random Initialization (MRBORI) to enhance parameter control and yield in semiconductor manufacturing. The proposed framework synergizes XGBoost-based feature selection, which identifies critical parameters in high-dimensional spaces, with a custom deep learning surrogate model that captures complex nonlinear interactions. Building on these insights, the MRBORI strategy leverages multiple optimization restarts, each initialized randomly, to mitigate local minima risks and systematically explore broad parameter spaces. Experimental validation using real-world data from an epitaxial silicon carbide (Epi SiC) process demonstrates notably tighter thickness control and improved yield compared to traditional methods. By unifying DT-driven real-time insights with advanced machine learning and multi-restart optimization, this framework offers a robust and precise solution for tackling the complexities of modern semiconductor manufacturing.