Zheng-Dong Luo

Ferroelectric‐based non‐volatile memories (NVMs), which can merge logic and memory functionalities within a single device, represent a promising solution for future in‐memory computing architecture. Although various types of ferroelectric‐based NVM are demonstrated, a device concept integrating compact structure, reconfigurable operation and superior performance that can meet the demands of the emerging in‐memory computing remains to be explored. Here, a new type of device termed ferroelectric field‐effect memtransistor (FeFEMT) is reported, which features a multifunctional device operation scheme using the proposed multi‐terminal operability. In this device, multi‐level non‐volatile conductance switching based on the ferroelectric polarisation switching and the multidomain structure can be achieved with either gate‐ or drain‐voltage control. The device operates with control voltage inputs from both drain and gate terminals, enabling a single‐transistor structure two‐input Boolean logic‐in‐memory gate. Furthermore, the drain‐voltage controlled multidomain structure enables the FeFEMT to function as a two‐terminal synaptic transistor, showing excellent analogue conductance switching with over 7‐bit conductance states. The demonstrated synaptic properties consequently facilitate the simulation of implementation of a convolutional neural network, offering a superior inference performance. These findings highlight the prospects of the FeFEMTs as a suitable device technology for diverse and high‐efficiency in‐memory computing hardware platform.

Programmable and nonvolatile Schottky junctions are highly desirable for next-generation electronic and neuromorphic systems. However, conventional metal-semiconductor and even van der Waals (vdW) Schottky diodes often suffer from fixed rectifying behaviors or limited tunability. Here, we report a programmable nonvolatile ferroelectric Schottky diode based on a vdW heterojunction between semimetallic 1T'-MoTe₂ and ferroelectric α-In₂Se₃. The diode exhibits near-ideal performance, including a rectification ratio exceeding 10⁴, a leakage current down to 1 pA, and an ideality factor as low as 1.38. By switching ferroelectric polarization, the Schottky barrier can be modulated in a programmable manner, enabling reversible, nonvolatile, and multilevel rectification states. The device demonstrates polarization-dependent photoresponse and transient integrate-and-leak dynamics, closely resembling biological spiking neurons. A spiking neural network is implemented based on this behavior, achieving image recognition accuracy up to 98.4%. This work establishes programmable ferroelectric Schottky diodes as promising candidates for low-power memory, reconfigurable logic, and neuromorphic vision.

Ferroelectric polarization switching, achieved by mechanical forces, enables the storage of stress information in ferroelectrics and holds promise for human interface applications. The prevailing mechanical approach is locally induced flexoelectricity with large strain gradients. However, this approach usually requires huge mechanical forces, which greatly impede device applications. Here, we report an approach of using triboelectric effect to mechanically, reversibly switch ferroelectric polarization across α-In ₂ Se ₃ ferroelectric memristors. Through contact electrification and electrostatic induction effects, triboelectric units are used to sensitively detect mechanical forces and generate electrical voltage pulses to trigger α-In ₂ Se ₃ resistance switching. We realize multilevel resistance states under different mechanical forces, by which a neuromorphic stress system is demonstrated. Notably, we achieve the reversal of α-In ₂ Se ₃ ferroelectric polarization with a record-low mechanical force of ~10 kilopascals and even with tactile touches. Our work provides a fundamental but pragmatic strategy for creating mechanical tactile ferroelectric memory devices.

The co‐integration of logic, memory, synapse, and other essential functionalities into one single element with run‐time reconfigurability is explored as a promising approach for an efficient and flexible in‐memory computing platform. However, despite ample research focused on such reconfigurable semiconductor technology, it remains challenging to achieve a CMOS‐compatible device concept that is with simplified device structure, versatile functionalities, and efficient operation schemes. Here, a new type of run‐time electrically reconfigurable device is demonstrated based on dielectric‐engineered 2D semiconductor transistors. With an engineered semiconductor/charge‐trap layer/dielectric film heterostructure, the 2D charge‐trap transistor (CTT) resembles a simplified metal‐oxide‐semiconductor field‐effect transistor (MOSFET) structure. Both multilevel permanent charge trapping and transient voltage‐modulating capabilities can be realized in the 2D CTTs, giving rise to various switchable device function modes including non‐volatile memory, threshold voltage‐variable logic switch, and artificial synapse. Leveraging the monolithic integration of multiple 2D CTTs and time‐sequential reconfigurable operation strategy, high‐performance logic inverter and non‐volatile ternary content‐addressable memory (TCAM) with compact architecture can be created. The performance of the 2D CTTs in synapse mode is evaluated with the simulation of the convolutional neural network, showing great potential for future neuromorphic computing hardware.

β-(AlxGa1−x)2O3/Ga2O3 modulation-doped field-effect transistors (MODFETs) with a dual-metal gate (DMG) architecture are designed, and the electrical characteristics of the DMG device are investigated in comparison with the single-metal gate (SMG) device by the Technology Computer-Aided Design (TCAD) simulation. The results demonstrate that the DMG MODFETs possess a superior transconductance (gm), current gain cut-off frequency (fT), and power gain cut-off frequency (fMAX) than those of SMG transistors, which is attributed to the regulated channel electric field by a DMG structure. With a gate length of 0.1 μm, the peak values of fT/fMAX of the designed DMG MODFET are obtained as 48.6/50.6 GHz, respectively. Moreover, a comprehensive thermal analysis is conducted between the SMG and DMG devices under steady-state and transient conditions. The DMG MODFET exhibits a lower maximum temperature than the SMG counterpart due to the reduced channel electric field, each subjected to the same power dissipation. This finding underscores the potential of the β-(AlxGa1−x)2O3/Ga2O3 MODFET with the DMG architecture as a promising approach for high-power radio frequency operations.

Complementary field-effect transistors (CFETs) with a vertically stacked n-FET/p-FET configuration can provide a promising solution to boost area efficiency. However, the substantial power dissipation exhibited by these CFET devices poses a notable challenge to the energy efficiency. By combining a negative-capacitance field-effect transistor (NCFET) and a CFET, the problem of excessive power consumption can be solved. By using a negative-capacitance gate stack, the supply voltage (Vdd) applied to the gate of the CFET is increased, resulting in a reduction in power consumption. Here, we experimentally demonstrate a vertically integrated complementary negative capacitance field-effect transistor (NC-CFET) that combines tungsten diselenide (WSe2) p-NCFET and molybdenum disulfide (MoS2) n-NCFET. With the hexagonal boron nitride/copper indium thiophosphate CuInP2S6 (CIPS) dielectric stack, both n-type and p-type van der Waals (vdW) NCFETs exhibit sub-60 mV/decade switching characteristics. The vdW NC-CFET exhibits a voltage gain of 78.34 and a power consumption of 129.7 pW at a supply voltage of 1 V. These device characteristics demonstrate the great potential of the vdW NC-CFET for high density and low power applications.